A Packet-Based Approach for Optimal Neural Network Acceleration

A Packet-Based Approach for Optimal Neural Network Acceleration
by Kalar Rajendiran on 11-08-2021 at 10:00 am

6 Optimal Work Unit Designed for DLA

The Linley Group held its Fall Processor Conference 2021 last week. There were a number of very informative talks from various companies updating the audience on the latest research and development work happening in the industry. The presentations were categorized as per their focus, under eight different sessions. The sessions… Read More


Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC

Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC
by Kalar Rajendiran on 11-04-2021 at 6:00 am

6 Reason 1 High Bandwidth 6

As part of their webinar series, SemiWiki hosted one in June with the title “Five Reasons Why a High Performance Reconfigurable SmartNIC Demands a 2D NoC.” The talk by given by Scott Schweitzer, Sr. Manager, Product Planning at Achronix. Scott is a lifelong technology evangelist and focuses on recognizing technology trends and… Read More


Lecture Series: Designing a Time Interleaved ADC for 5G Automotive Applications

Lecture Series: Designing a Time Interleaved ADC for 5G Automotive Applications
by Kalar Rajendiran on 11-01-2021 at 6:00 am

Slide AMS Lecture Series Snapshot

A recent educational virtual event with the above title was jointly sponsored by Synopsys and Global Foundries. The objective was to bring awareness to state-of-the-art mixed-signal design practices for automotive circuits. The 2-day event comprised of lectures delivered by engineering professors and doctoral students… Read More


Using PUFs for Random Number Generation

Using PUFs for Random Number Generation
by Kalar Rajendiran on 10-19-2021 at 6:00 am

3 API Functions

In our daily lives, few of us if any, would want randomness to play any role. We look for predictability in order to plan our lives. But reality is that random numbers have been playing a role in our lives for a long time. The more conspicuous use cases of random numbers are with key fobs, and nowadays mobile phones. And then there are a … Read More


Silicon Startups, Arm Yourself and Catalyze Your Success…. Spotlight: Semiconductor Conferences

Silicon Startups, Arm Yourself and Catalyze Your Success…. Spotlight: Semiconductor Conferences
by Kalar Rajendiran on 10-17-2021 at 10:00 am

Live Panel

The arrival of fall seems to typically raise the number of conferences hosted by semiconductor ecosystem companies. The conferences may go by different names. But whether called a forum, summit, conference, or by some other creative name, the purpose is the same. It is to bring together technologists and business people together… Read More


Hardware Data Acceleration for Semiconductor Design

Hardware Data Acceleration for Semiconductor Design
by Kalar Rajendiran on 10-11-2021 at 6:00 am

What if you could Table

This blog is a follow-on piece to an earlier one titled NetApp’s ONTAP Enables Engineering Productivity Boost.  If you have not had an opportunity to read that blog,  please do so for context. Using real life examples, it showcases how customers could improve real-world design engineering productivity as much as 10%.

For the … Read More


On-Device Tensilica AI Platform For AI SoCs

On-Device Tensilica AI Platform For AI SoCs
by Kalar Rajendiran on 10-05-2021 at 6:00 am

Varying On Device AI Requirements 1

During his keynote address at the CadenceLIVE 2021 conference, CEO Lip-Bu Tan made some market trend comments. He observed that most of the data nowadays is generated at the edge but only 20% is processed there. He predicted that by 2030, 80% of data is expected to be processed at the edge. And most of this 80% will be processed on edge… Read More


Synopsys’ ARC® DSP IP for Low-Power Embedded Applications

Synopsys’ ARC® DSP IP for Low-Power Embedded Applications
by Kalar Rajendiran on 09-30-2021 at 10:00 am

Key Applications Driving PPA Optimized Signal Processing

On Sep 20th, Synopsys announced an expansion of its DesignWare® ARC® Processor IP portfolio with new 128-bit ARC VPX2 and 256-bit ARC VPX3 DSP Processors targeting low-power embedded SoCs. In 2019, the company had launched a 512-bit ARC VPX5 DSP processor for high-performance signal processing SoCs. Due to the length, format… Read More


Securing Applications: A PUFiot Solution for RISC-V-based IoT Devices

Securing Applications: A PUFiot Solution for RISC-V-based IoT Devices
by Kalar Rajendiran on 09-27-2021 at 6:00 am

PUFiot Supporting Secure Applications

In June 2021, eMemory Technology hosted a webinar titled “PUFiot: A PUFrt-based Secure Coprocessor.” You can read a blog leading up to that webinar here. PUFiot is a novel high-security crypto coprocessor. You can access a recording of that entire webinar from eMemory’s Resources page. While the focus of that webinar was to present… Read More


The Path to 200 Gbps Serial Links

The Path to 200 Gbps Serial Links
by Kalar Rajendiran on 09-23-2021 at 10:00 am

Industry is Quickly Scaling

Ethernet speed evolution has kept a nice pace over the years even without any competing communications standard. And there are no signs of that slowing down, thanks to innovative companies deploying creative design techniques to keep delivering high-performance SerDes IP solutions. SerDes plays an integral role in implementing… Read More