Driven by the need to rapidly move data across a chip, the NoC IP is already a very common structure for moving data with an SoC. And various implementations of the NoC IP are available in the market depending on the end system requirements. Over the last few years, the RISC-V architecture and the TileLink interface specification … Read More
Author: Kalar Rajendiran
Closing the Communication Chasms in the SoC Design and Manufacturing Supply Chain
In sports, we’re all familiar with how even a team with the best individual players for every role needs to be coordinated as a team to win a championship. In healthcare, a patient is better served with a well-trained primary physician to coordinate with the various medical specialists. The field of semiconductors involves a series… Read More
DesignDash: ML-Driven Big Data Analytics Technology for Smarter SoC Design
With time-to-market pressures ever increasing, companies are continually seeking enhanced designer productivity, faster design closure and improved project management efficiency. To accomplish these, organizations invest a lot in implementing both standardized approaches and proprietary techniques. With ever increasing… Read More
Leveraging Simulation to Accelerate the Design of Plasma Reactors for Semiconductor Etching Processes
There is no shortage of reporting on the many technological advances happening within the semiconductor industry. But sometimes it feels like we hear less in the area of semiconductor manufacturing equipment than in the design and product arenas. That doesn’t mean that there is less happening there or what is happening there … Read More
Importance of an Analytics Platform Before Migrating to the Cloud
After many years of hesitancy to jump with both feet in, semiconductor companies are seriously considering implementing cloud strategies and making required investments. Their concern though is, how much investment is it going to take? Some of the block-and-tackle challenges they face in implementing a cloud strategy are … Read More
Die-to-Die IP enabling the path to the future of Chiplets Ecosystem
The topic of chiplets is getting a lot of attention these days. The chiplet movement has picked up more momentum since Moore’s law started slowing down as process technology approached 5nm. With the development cost of a monolithic SoC crossing the $500M and wafer yields of large die-based chips dropping steeply, the decision … Read More
Very Short Reach (VSR) Connectivity for Optical Modules
Bandwidth, latency, power and reach are always the key points of focus when it comes to connectivity. As the demand for more data and higher bandwidth connectivity continue, power management is gaining a lot of attention. There is renewed interest in pursuing silicon photonics to address many of these challenges. There are many… Read More
Protecting High-Speed Interfaces in Data Centers with Security IP
The never ending appetite for higher bandwidths, faster data interfaces and lower latencies are bringing about changes in how data is processed at data centers. The expansion of cloud to the network edge has introduced broad use of artificial intelligence (AI) techniques for extracting meaning from data. Cloud supercomputing… Read More
Bringing Prototyping to the Desktop
A few months ago, I wrote about Corigine and their MimicPro FPGA prototyping system and MimicTurbo GT card solutions. That article went into the various features and benefits of the two solutions, with the requirements for next-generation prototyping solutions as the backdrop. You can access that article here. At 250+ employees,… Read More
Advantages of Large-Scale Synchronous Clocking Domains in AI Chip Designs
We are currently in the hockey stick growth phase of AI. Advances in artificial intelligence (AI) are happening at a lightning pace. And, while the rate of adoption is exploding, so is model size. Over the past couple of years, we’ve gone from about two billion parameters to Google Brain’s recently announced trillion-parameter… Read More
Facing the Quantum Nature of EUV Lithography