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Many tools find clock domain crossings (CDCs) in FPGA designs. Some don’t find the right ones since they don’t comprehend things like in-house synchronizer constructs. Some find too many based on misunderstanding intent, inaccurate constraints, and other factors that lead to noise.… Read More
In the ongoing debate over substantive use cases and the difference between we “can” do something and we “should” do something, technologists and the firms they work for may be all that stand between the rebirth of innovation and the decline of civilization.… Read More
Efficient collaboration is essential to meeting tight chip design schedules. In analog and mixed signal (AMS) design, collaboration has many facets. Design tools are usually specific to roles, and handoffs are numerous, especially when moving a design to a foundry. … Read More
The opening line of a recent Benedict Evans piece makes a bold statement: “The smartphone platform wars are pretty much over, and Apple and Google won.” Reading that line reminded me of the William Shatner scene in Airplane 2; let’s just shut it down and go home. That’s not the point Evans is making, however, … Read More
Some analysts are starting to get the idea that their credibility is worth something. Research firm IC Insights has actually dialed back its latest IoT semiconductor projection through 2019, although still calling for what would be quite robust overall growth.… Read More
‘Parker’ is a fascinating name for a chip designed for autonomous vehicles – more likely, the project name was pulled off a map as a bedroom community near Denver. First highlighted on the roadmap in 2013, and advertised as inside the DRIVE PX 2 platform shown at CES 2016, NVIDIA revealed some details of Parker at Hot Chips 2016.… Read More
18 months ago Renesas announced they were prototyping their SG-MONOS eFlash on 28nm, and at the time we said it would be a couple of years before actual product. Yesterday, Renesas revealed their partner in this effort is TSMC – no surprise – and hinted things are moving, with better performance than expected but on a longer qualification… Read More
AMD is a fantastic company with highly talented people, but for some reason just hasn’t managed to put a winning streak of microprocessor architectures back-to-back. It’s frustrating to watch: they ride like mad to catch up to or even pull slightly ahead of Intel, then fall back in the pack when they have to make an extended pit stop,… Read More
Flex Logix has been heads-down for the last several months working toward customer implementations of their EFLX reconfigurable RTL IP cores. Today, they’ve announced a family of 10 hard IP cores ready in TSMC 40ULP, and provided an update to their roadmap for us.… Read More
Teams buy HDL simulation for best bang for the buck. Teams buy hardware emulation for the speed. We’ve talked previously about SCE-MI transactors as a standardized vehicle to connect the two approaches to get the benefits of both in an accelerated testbench – what else should be accounted for?… Read More
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