SHIELDing the Android GPU developer in C

SHIELDing the Android GPU developer in C
by Don Dingee on 02-18-2013 at 12:52 pm

Repeat after me: SoCs are paperweights if they can’t be programmed. Succeeding with a new part today means supporting a robust developer program to attract and engage as many creatives as possible. NVIDIA has teamed up with Mentor Graphics in just such an adventure. If you read just the press release, you may have missed the real … Read More


UVM: Lowering the barrier to IP reuse

UVM: Lowering the barrier to IP reuse
by Don Dingee on 02-06-2013 at 2:00 am

One of my acquaintances at Intel must have some of the same viewing habits I do, based on a recent Tweet he sent. He was probably watching “The Men Who Built America” on the History Channel and thinking as I have a lot recently about how the captains of industry managed to drive ideas to monopolies in the late 1800s and early 1900s.

Difference

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Help, my IP has fallen and can’t get up

Help, my IP has fallen and can’t get up
by Don Dingee on 02-03-2013 at 8:10 pm

We’ve been talking about the different technologies for FPGA-based SoC prototyping a lot here in SemiWiki. On the surface, the recent stories all start off pretty much the same: big box, Xilinx Virtex-7, wanna go fast and see more of what’s going on in the design. This is not another one of those stories. I recently sat down with Mick… Read More


Seeing inside SoC designs, from the beginning

Seeing inside SoC designs, from the beginning
by Don Dingee on 01-31-2013 at 8:10 pm

Engineers have this fascination with how things work. They are thrilled to tear stuff apart, and sometimes to even be able to put it back together afterwords. So I can keep my recovering engineer card, I thought I’d take a few moments and look inside a technology Daniel Payne and I have been covering here, exploring where the idea started… Read More


Time in a model: xtUML and concurrency

Time in a model: xtUML and concurrency
by Don Dingee on 01-27-2013 at 9:00 pm

Most embedded programming strategies involve decomposing the embedded application into chunks, which can then be executed as independent tasks. More advanced applications involve some type of data flow, and may attempt to execute operations in parallel where possible.… Read More


You may want to check that known-good RTL

You may want to check that known-good RTL
by Don Dingee on 01-23-2013 at 1:00 pm

In his blog Coding Horror, Jeff Atwood wrote: “Software developers tend to be software addicts who think their job is to write code. But it’s not. Their job is to solve problems.” Whether the tool is HTML, C, or RTL, the reality is we are now borrowing or buying more software IP than ever, and integrating it into more complex designs,… Read More


What did CES 2013 mean for #SemiEDA?

What did CES 2013 mean for #SemiEDA?
by Don Dingee on 01-18-2013 at 4:55 pm

CES is the preeminent gadget show, and in the LVCC South Hall a wave has been building for some time. It’s now the place where chipsets are introduced, and this year saw a wide range of introductions from Atmel, Bosch, Broadcom, Intel (OK, they’re still in Central Hall), InvenSense, Marvell, NVIDIA, Qualcomm, Samsung, ST-Ericsson,… Read More


Integrating your SoC into the analog world

Integrating your SoC into the analog world
by Don Dingee on 01-02-2013 at 7:00 pm

Our world is decidedly analog, made up of stimuli for our five basic senses of sight, touch, hearing, taste, and smell, and more advanced senses like balance and acceleration. To be effective on the Internet of Things, digital devices must integrate with the analog world, interfacing with sensors and control elements.… Read More


Apply within: four embedded instrumentation approaches

Apply within: four embedded instrumentation approaches
by Don Dingee on 12-21-2012 at 9:00 am

Anyone who has been around technology consortia or standards bodies will tell you that the timeline from inception to mainstream adoption of a new embedded technology is about 5 years, give or take a couple dream cycles. You can always tell the early stage, where very different concepts try to latch on to the same, simple term.

Such… Read More


Cortex-A9 speed limits and PPA optimization

Cortex-A9 speed limits and PPA optimization
by Don Dingee on 12-19-2012 at 3:01 pm

We know by now that clock speeds aren’t everything when it comes to measuring the goodness of a processor. Performance has direct ties to pipeline and interconnect details, power factors into considerations of usability, and the unspoken terms of yield drive cost.

My curiosity kicked in when I looked at the recent press release… Read More