Special Interest Group for HSPICE at DesignCon in Two Weeks

Special Interest Group for HSPICE at DesignCon in Two Weeks
by Daniel Payne on 01-13-2014 at 8:00 pm

DesignCon brings together engineers from around the world that are interested in IC design, package design and board design, plus the signal integrity issues of creating high-speed systems. In just two weeks there’s a Special Interest Group(SIG) just for users of HSPICE in their tool flow, and it meets for three hours during… Read More


Social Media at Aldec

Social Media at Aldec
by Daniel Payne on 01-09-2014 at 5:38 pm

I’ve been blogging about EDA and Semiconductor companies using social media to create new ways to talk and listen to engineers, so today I looked at Aldec and how they are using social media. Aldec offers EDA products for: FPGA Simulation, functional verification, emulation, and MIL/Aero verification. Their Home page … Read More


Mastering the Magic of Multi-Patterning

Mastering the Magic of Multi-Patterning
by Daniel Payne on 01-03-2014 at 7:03 pm

I’ve been quite impressed that modern ICs use a lithography process with 193nm light sources to resolve final feature sizes at 20nm and smaller dimensions. We’ve been blogging about Double Patterning Technology (DPT) some 45 times in the past few years that enable 20nm fabrication, so one big question for me is, “How… Read More


Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications

Early Thermal and Power Simulation Using Virtual Prototyping for Pedestrian Detection Applications
by Daniel Payne on 12-30-2013 at 5:00 am

In the 1970’s we designed ICs first and when silicon came back then we measured the power and junction temperature. At that time there were no EDA simulation tools or models for full-chip power and temperature analysis. Fast forward to 2013 and we find that temperature and power are still demanding requirements for MPSoC … Read More


EDA and Semi IP Stocks in 2013: MENT, ARMH, CDN, SNPS, ANSS, CEVA, IMG.L

EDA and Semi IP Stocks in 2013: MENT, ARMH, CDN, SNPS, ANSS, CEVA, IMG.L
by Daniel Payne on 12-20-2013 at 12:39 am

2013 was an up year for the stock markets as both the DJIA and the tech-heavy NASDAQ showed significant growth, so how did EDA and Semi IP companies do in the past 12 months? A quick stock plot from Yahoo Finance shows us that only two of the seven companies beat the NASDAQ: ARMH, MENT.… Read More


The Most Popular Blog Posts at Cadence in 2013

The Most Popular Blog Posts at Cadence in 2013
by Daniel Payne on 12-19-2013 at 11:42 am

I spend about an hour a day reading blogs from EDA companies, foundries, independent bloggers and of course, SemiWiki. Richard Goering at Cadence assembled a top 10 list of the most popular blogs posted on their site in 2013, revealing that engineers were most interested in: FinFETs, 20nm and smaller nodes, memory technology and… Read More


Verification of Multirate Systems with Multiple Digital Blocks

Verification of Multirate Systems with Multiple Digital Blocks
by Daniel Payne on 12-13-2013 at 8:27 pm

Our popular smart phones have a whole slew of RF-based radios in them for: Bluetooth, WiFi, LTE, GSM, NFC. Using just a single clock frequency for a DSP function or SoC is a thing of the past, so the design of multirate systems is here to stay. So now the challenge on the design and verification side is to use a methodology that supports:… Read More


Impact Conference: Focus on the IP Ecosystem

Impact Conference: Focus on the IP Ecosystem
by Daniel Payne on 12-11-2013 at 7:07 pm

Jim Feldhan, President of Semico Research presented earlier this month at the Impact Conference on the topic: Focus on the IP Ecosystem. I’ve reviewed his 19 page presentation, and summarize it with:

  • End markets like smart phones and tablets are dominant
  • Growth drivers include the Internet of Things (IoT)
  • World semi forecast
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