About once a quarter, I touch base with Cristian Amitroaie, CEO and co-founder of AMIQ EDA, to see what’s new with the company, products, and users. Sometimes he surprises me, as he did earlier this year when he mentioned that their tools check about 150 rules for non-standard constructs in SystemVerilog and VHDL. When we talked … Read More
Author: Daniel Nenni
CEO Interview: Sivakumar P R of Maven Silicon
Sivakumar P R is the Founder and CEO of Maven Silicon. He is responsible for the company’s vision, overall strategy, business, and technology. He is also the Founder and CEO of Aceic Design Technologies.
Sivakumar is a seasoned engineering professional who has worked in various fields, including electrical engineering,… Read More
CEO Interview: Deepak Shankar of Mirabilis Design
The founder of Mirabilis Design, Mr. Shankar has over two decades of experience in management and marketing of system level design tools. Prior to establishing Mirabilis Design, he held the reins as Vice President, Business Development at MemCall, a fabless semiconductor company and SpinCircuit, a joint venture of industry… Read More
TSMC and the FinFET Era!
While there is a lot of excitement around the semiconductor shortage narrative and the fabs all being full, both 200mm and 300mm, there is one big plot hole and that is the FinFET era.
Intel ushered in the FinFET era only to lose FinFET dominance to the foundries shortly thereafter. In 2009 Intel brought out a 22nm FinFET wafer at the… Read More
CEO Interview: Prakash Murthy of Atonarp
Prakash Murthy is the co-founder & CEO of Atonarp, a leading molecular diagnostics company HQ in Tokyo Japan. Murthy has two decades of experience in engineering management and entrepreneurial ventures. Murthy also co-founded Inspiration Technologies and C2Silicon Software and served as the CEO of Core Solutions Inc.… Read More
TSMC 2021 Technical Symposium Actions Speak Louder Than Words
The TSMC Symposium kicked of today. I will share my general thoughts while Tom Dillinger will do deep dives on the technology side. The event started with a keynote by TSMC CEO CC Wei followed by technology presentations by the TSMC executive staff.
C.C. Wei introduced a new sound bite this year that really resonated with me and that… Read More
WEBINAR: What Makes SoC Compiler The Shortest Path from SoC Design Specification to Logic Synthesis?
Defacto SoC Compiler whose 9.0 release was announced recently automates the SoC design creation from the first project specifications. It covers register handling, IP and connectivity insertion at RTL, UPF and SDC file generation right to logic synthesis. As part of the generation process of RTL and design collaterals, basic… Read More
CEO Interview: Toshio Nakama of S2C EDA
Toshio Nakama is the founder and the CEO of S2C and also a strong advocate of FPGA accelerated ASIC/SoC design methodology. Mr. Nakama devotes much of his time in promoting scalable Prototyping/Emulation hardware architecture and defining automated software specifications. He first started his career at Altera in 1997 and … Read More
NetApp Simplifies Cloud Bursting EDA workloads
Why burst EDA workloads to the cloud
Time to market challenges are nothing new to those of us who have worked in the semiconductor industry. Each process node brings new opportunities s along with increasingly complex design challenges. 7nm, 5nm and 3nm process nodes have introduced scale, growth, and data challenges at a level… Read More
Webinar: Challenges in creating large High Performance Compute SoCs in advanced geometries
When we think about Compute and AI SoCs, we often focus on the huge numbers of calculations being carried out every second, and the ingenious IPs that are able to reach such high levels of performance. However, there also exists a significant challenge in keeping the vast quantities of data flowing around the chip which is solved … Read More








Intel to Compete with Broadcom and Marvell in the Lucrative ASIC Business