SK hynix’s Hot Chips 2026 presentation explains how High Bandwidth Memory (HBM) is evolving to meet the extraordinary memory requirements of artificial intelligence. Its central message is that future progress will depend not only on better DRAM circuits but also on advanced packaging, denser vertical integration, improved… Read More
Author: Admin
HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory
Five Billion Pulses Later: What DUV Optics Testing Reveals About Semiconductor Tool Uptime
By Dr. Sabina Kuprėnaitė
Deep-ultraviolet optics used in semiconductor lithography may be exposed to billions of pulses over their service life. That creates a qualification challenge that initial reflectance specifications or laser-induced damage thresholds alone cannot answer.
A mirror may meet its optical specification… Read More
Crescent Island: Turning Memory Capacity into Agentic AI Throughput
Intel’s Crescent Island is a discrete data-center GPU designed for agentic AI inference, where performance is constrained by more than matrix arithmetic. Multi-step agents impose latency through repeated model calls and tool interactions, consume large memory capacity for weights and long-context key-value caches, and… Read More
Intel Diamond Rapids: Building Xeon Up, Out, and Through Silicon
Akhilesh Kumar & Krishnakanth Sistla, Intel
Diamond Rapids is Intel’s next-generation Xeon processor, designed around the proposition that hyperscale performance increasingly depends on moving, processing, and protecting data as efficiently as executing instructions. The architecture replaces the conventional… Read More
Intel Wildcat Lake: Right-Sizing Silicon Without Sinking Performance
Lance Hacking, Intel
Intel Core Series 3, code-named Wildcat Lake, is a mainstream client system-on-chip derived from the Panther Lake-based Core Ultra Series 3 architecture. Its design objective is not maximum feature density, but broad deployment of current-generation CPU, graphics, AI, memory, security, and connectivity… Read More
RISC-V at Sixteen: From Modular ISA to Standardized Platforms at Hot Chips 2026
RISC-V has evolved from a Berkeley research architecture into a global instruction-set standard spanning embedded controllers, application processors, accelerators, and emerging servers. Its defining technical characteristic is not merely openness, but disciplined modularity. Four ratified base ISAs—RV32I, RV64I,… Read More
Hot Chips: Evolving Memory Architectures for Artificial Intelligence
Artificial intelligence performance is increasingly constrained by memory rather than arithmetic throughput. Scaling laws show that model quality improves when parameter count, training data, and compute grow together, but this balance fails when processors cannot obtain operands quickly enough. Contemporary accelerators… Read More
Reducing EUV Exposure Dose Through Underlayer Engineering
Extreme-ultraviolet lithography is essential for manufacturing advanced semiconductor devices, but its continued scaling presents a difficult materials problem. Photoresists must simultaneously provide high resolution, low exposure dose, limited line-edge or linewidth roughness, and extremely low defectivity. … Read More
The Twelve-Month Rule Does Not Describe a New Fab
By Nikhil Shah
Capital spending is often treated as if it becomes semiconductor capacity about twelve months later. That can be a useful rule for equipment installed in an existing fab. It is a poor description of a new fab built from the ground up.
I tested the distinction using five advanced-node projects in the United States where… Read More
Latest Savage on Security Webinar Focuses on Gen-AI for Chip Design and Security
Key Takeaways from the webinar:
Multi-agent intelligent assistant systems of the future will be architected to automate and augment SoC design and security verification and redefining semiconductor innovation, reshaping design, verification and security for the next generation of trusted silicon.
The ESD Alliance is delighted… Read More
Five Billion Pulses Later: What DUV Optics Testing Reveals About Semiconductor Tool Uptime