Variation Aware FinFETs are Critical!

As I mentioned in “EDA Dead Pool” acquisitions in our industry will continue at a rapid pace. The latest victim is 10 year old French company Infiniscale who was recently purchased by Silvaco. This was more of a “let’s put your product through our massive sales and support channel” kind of deal so it will be 1 + 1 = 3 accretive for sure. Plus, variation aware tools use SPICE licenses so it makes perfect sense for a company like Silvaco (SmartSPICE) to go into variation, absolutely.

“The increased variability associated with advanced processes result in increased yield risks that designers need to mitigate while they strive to meet aggressive power, performance and area goals,” said Infiniscale’s Chief Executive Officer Dr. Firas Mohamed. “Infiniscale invented a second generation of Monte Carlo analyses that helps designers meet these increasingly stringent goals, with a user-friendly variation-aware design methodology. We are proud of the opportunity to be part of Silvaco’s legacy of technology leadership and are deeply committed to working together to continue providing innovative solutions for our customers and the design community.”

“There is good synergy between Silvaco and Infiniscale, and this acquisition further advances Silvaco’s growth initiatives to provide our customers with a robust TCAD-to-signoff set of design tools,” said Silvaco’s Chief Executive Officer David L. Dutton. “Infiniscale’s impressive variation analyses technology strengthens Silvaco’s SPICE portfolio, which includes SmartSpice circuit simulator, EM/IR/thermal analysis, standard cell and memory characterization, bringing unique accuracy, performance and economic value to support our customers’ leading-edge IC designs. This acquisition increases our presence in the European market as the Infiniscale team will join our Grenoble, France site.”

There are four companies that play in the variation aware tool space:Solido Design, MunEDA, ProPlus, and Infiniscale. Notice none of the big four EDA companies (Synopsys, Cadence, Mentor, Ansys) compete in this area? Not yet anyway, so expect more acquisitions before #53DAC for sure.

What are the specific variation challenges FinFET designers face you ask? Great question, let’s start with PVT Corner Design at 16nm and 10nm. There are literally tens of thousands of simulation combinations to consider. You can either (1) simulate them all over a period of months with thousands of SPICE licenses or (2) you can guess at which ones to simulate or (3) you can use a variation tool to statistically tell you which ones you should care about.

Next is High-sigma Monte Carlo design. For SRAM and Standard Cells this is a no brainer since they are repeated thousands and thousands of times throughout designs and yield is extremely critical. Before FinFETs, designers would simulate to 3-sigma and extrapolate to High-sigma. If you try that with FinFETs either you will not yield or your design margins will not be competitive. Using HMC you can now do a year’s worth of simulations with a handful of SPICE licenses in a matter of hours or maybe days to get you up to 6 or 7 sigma with SPICE accuracy. Seriously, I have seen it done and know by experience that the top foundries and their biggest customers use variation tools for 16nm and 10nm SRAM and complex standard cells, absolutely.

Also Read: EDA Mergers and Acquisitions Wiki