Bridging the Gap between Foundry and IC Design at #53DAC

Bridging the Gap between Foundry and IC Design at #53DAC
by Daniel Payne on 06-23-2016 at 12:00 pm

In our semiconductor ecosystem we often specialize the engineers and therefore EDA tools into separate silos like Foundry, front-end design, back-end design, tapeout, etc. What I discovered at #53DAC a few weeks ago was that some EDA companies actually bridge the gap between foundry engineers and IC designers with their tools.… Read More


Process Development, CAD and Circuit Design

Process Development, CAD and Circuit Design
by Daniel Payne on 04-29-2016 at 7:00 am

Working at Intel as a circuit designer I clearly remember how there were three distinct groups: Process Development, CAD and Circuit Design. Each of the groups sat in a different part of the building in Aloha Oregon, we had different job titles, different degrees, spoke with different acronyms and yet we all had to work together … Read More


The Importance of Transistor-Level Verification

The Importance of Transistor-Level Verification
by Students@olemiss.edu on 04-10-2016 at 7:00 am

According to the IEEE Std 1012-2012, verification is the acknowledgement that a product is in satisfactory condition by meeting a set of rigorous criteria. [3] Transistor-level verification involves the use of custom libraries and design models to achieve ultimate performance, low power, or layout density. [2] Prediction… Read More


Webinar: A Tool for Process and Device Evaluation

Webinar: A Tool for Process and Device Evaluation
by Tom Simon on 03-24-2016 at 12:00 pm

Not only are foundries continuing to introduce processes at new advanced nodes, they are frequently updating or adding processes at existing nodes. There are many examples that illustrate this well. TSMC now has 16FF, 16FF+ and now 16FFC. They are also announcing 10nm and 7nm processes. In addition, they are going back to older… Read More


Variation Aware FinFETs are Critical!

Variation Aware FinFETs are Critical!
by Daniel Nenni on 12-18-2015 at 4:00 pm

As I mentioned in “EDA Dead Pool” acquisitions in our industry will continue at a rapid pace. The latest victim is 10 year old French company Infiniscale who was recently purchased by Silvaco. This was more of a “let’s put your product through our massive sales and support channel” kind of deal so it will be 1 + 1 = 3 accretive for sure.… Read More


Eyes Meet Innovations at DAC

Eyes Meet Innovations at DAC
by Pawan Fangaria on 06-14-2015 at 7:00 am

It gives me a very nice, somewhat nostalgic, feeling after attending the 52[SUP]nd[/SUP] DAC. There was a period during my final academic year in 1990 and my first job when I used to search through good technical papers in DAC proceedings and try implementing those concepts in my project work. In general, representation from ‘R&… Read More


Fast Monte Carlo and Analog Fast SPICE

Fast Monte Carlo and Analog Fast SPICE
by Daniel Payne on 06-08-2012 at 10:25 am

Britto Vincent of ProPlus Design Solutions met with me at DAC on Monday morning to talk about Design For Yield (DFY) and Analog Fast SPICE.

In 2011 ProPlus announced DFY tools where the technology came from IBM, it provides fast Monte Carlo results up to 3 sigma, then added NanoSpice for faster simulation results. Similar in approach… Read More