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ARM 64-bit

ARM 64-bit
by Paul McLellan on 10-30-2012 at 6:56 pm

AMD announced yesterday that they would be building 64-bit ARM-based chips intended for use in servers. What was unclear is what the processors would be like. Although ARM had announced that they would move into 64-bit processors they didn’t have any that they had actually announced as being available for licensing.

At the ARM conference today, Simon Segars announced their first two, known as the Cortex-A50 family. Not only AMD has licensed these processors, but ARM also announced Broadcom, Calxeda, HiSilicon, Samsung, and STMicroelectronics as licensees. Representatives of these companies answered questions. And unlike what it looks like in my terrible photograph, Simon’s head did not explode in the middle of the session.


The two cores announced are the Cortex-A57, which will be the most advanced high-performance processor targeted initially at servers. The Cortex-A53 (I don’t understand ARM’s numbering system either) is ARM’s most power-efficient application processor. The two processors can also be used together in big.LITTLE form to get the best of both worlds, performance when you need it, low-power when you don’t. ARM had some information on just how much smaller and more power efficient these cores are. Some of the comparisons are a bit apples to oranges, comparing 20nm versions of the new cores against 32nm versions of the old ones. But they do seem to be architecturally more efficient, not just leveraging off the process node changes. Processors using these new cores are not expected in volume production until 2014. Both processors can run both 32-bit and 64-bit code.


The interesting aspect of this is whether 64-bit ARM processors will get traction in datacenters (and another interesting question is how soon before we have 64-bit processors in our smartphones). At the press-only discussion later it was clear that people knew more than they were letting on. There was even a hint that something in this area might be announced in Warren East’s keynote on Thursday. Everyone said that the first place that ARM servers will show up are in the big fast-growing companies that are adding thousands of cores per week. There have been rumors that Facebook has been evaluating ARM. If the datacenters are the profit center for the company, not an ancillary to the main company business, and if the company is growing fast, then they are interested in ways to cost-optimize (including lower power, smaller physical footprint, cheaper to acquire). Companies like this only run a handful of applications and so it would be cost-effective to optimize them for ARM since the hardware costs are not yet sunk since they would initially go into green-field datacenters.


Improving FPGA Prototype Debugging

Improving FPGA Prototype Debugging
by Daniel Payne on 10-30-2012 at 10:00 am

FPGA Prototyping is growing in popularity as a method to get an SoC design into hardware running at clock speeds up to 100MHz or so. One downside during traditional FPGA prototyping debug is the limited number of internal signals that you can observe while trying to chase down bugs in the hardware design in the presence of running real software and drivers. Continue reading “Improving FPGA Prototype Debugging”


Apple and Samsung Take All the Profit

Apple and Samsung Take All the Profit
by Paul McLellan on 10-29-2012 at 4:07 pm

I’ve talked before about how Apple and Samsung make most of the money in the handset business (and also about how Nokia…er…doesn’t). Now there is a report from Canaccord Genuity makes it clear just how much of the profit they make: 106%. And that is down from second quarter when they made 108%.

How can they make more than all of it? Basically because the remaining players, Nokia, RIM (Blackberry), Motorola (Google), HTC, ZTE, LG and others lose money in the aggregate (I don’t think they are all unprofitable, but Nokia and RIM in particular are both large and unprofitable). Motorola was blamed for weakness in Google’s overall profits too.

Apple is estimated to capture 59% of the industry’s profits on 6.3% of unit sales (15.4% of smartphone sales which might be more relevant since Apple doesn’t make any non-smartphones). Samsung captured 47% of the profit on 25.6% of unit sales. Samsung is #1 in revenue, having taken the top spot from Nokia earlier this year. Apple is #1 on profitability. Google’s Android is the #1 operating system but Google doesn’t make money directly on it (except in its Motorola subsidiary) so it is hard to allocate a profit number to it. In fact I continue to wonder whether Android is brilliant strategy or stupid. If the aim is too hurt Microsoft and Apple it is certainly doing that (not that Apple is exactly hurting but it would have sold even more phones if Samsung/Android was not available). If the aim is to add to Google’s bottom line I’m not sure how. It’s not as if people make more use of Google on Samsung phones than on iPhones.


Jasper Property Synthesis Apps

Jasper Property Synthesis Apps
by Paul McLellan on 10-29-2012 at 7:00 am

Jasper restructured JasperGold so that it could deliver its formal technology more flexibly by having a base system and a porfolio of apps. This would also make it easier to upgrade capabilities by creating new apps. Today, Jasper announced two new apps:

  • JasperGold Structural Property Synthesis (SPS)
  • JasperGold Behavioral Property Synthesis (BPS)


The SPS App is used to detect and eliminate common functional design errors and ensure that the code is clean before validation starts. It is used early in the validation process without the need to write a testbench or provide stimuli. The structural properties are extracted from the RTL semantics and are used in early RTL development as well as during RTL signoff. These structural properties can be configured from a wide variety of pre-defined functional checks such as dead code checks, finite state machine (FSM) checks, arithmetic overflow checks, etc. The SPS App is tightly integrated with the entire set of JasperGold Apps drastically reducing the amount of checks that go undetected, un-proven, and un-diagnosed. Properties can be ranked, pre-classified and output in standard SystemVerilog Assertions (SVA) which can then be used in any assertion-based verification (ABV) flow such as simulation, formal analysis or emulation to increase functional coverage and reduce debug time. The SPS App provides a fully automated flow to identify and generate checks without the need to annotate the RTL.


The BPS App increases productivity and reduces time-to-market by generating assertions, constraints, and covers using the RTL and the existing simulation results obtained from batch simulations (FSDB/VCD) or interactive simulation (PLI). The BPS App is unique in its ability to create ‘white-box’ and ‘black-box’ properties as well as temporal multi-cycle properties. In addition,the BPS App can synthesize properties for signals from different modules across different levels of hierarchy. As with the SPS App, BPS provides an automated method for ranking and pre-classifying properties. The BPS App ranks synthesized properties according to their added functional verification value compared to design and manually written assertions, to reduce the number of property candidates the engineer must review. Moreover, the Apps methodology provides a unique flow that allows engineers to combine the BPS App and other JasperGold Apps to speed formal verification that significantly increases formal proof convergence. BPS supports both VCD and FSDB/VCD file formats.

SPS allows common bugs to be found early (and so cheaply) and improves the quality of verification beyond that achieved just with simulation. BPS can then be used in conjunction with simulation results to increase coverage, find coverage holes and improve the verification process.


Apple v. Samsung: Mixed Phone Marriages End in Divorce?

Apple v. Samsung: Mixed Phone Marriages End in Divorce?
by Daniel Nenni on 10-28-2012 at 8:10 pm

A funny thing happened at dinner the other night. The SemiWiki blog “8 Things I Hate about My iPhone5” caused quite a discussion. Half the table had Samsung phones and the other half iPhones. It really was more of a religious or political debate versus a rational consumer electronic discussion. An interesting side note, it seems mixed marriages, where one spouse has a Samsung phone and the other an iPhone, were much more likely to end in divorce. Seriously, my position is that the majority of ex-spouses or ex significant others have opposing phones.

To test this hypothesis you can participate in a highly scientific poll HERE. Anybody can vote so please do.

My marriage used to be mixed. In the past I let my wife and children pick whatever phones they liked. Moving to smartphones however I insisted on one phone type for all (crowd sourcing) and the vote was 2 for Android (oldest son and I) versus 4 for Apple. Now we all happily belong to the Church of Apple and shun Samsungites.

The legal action between Apple and Samsung probably increased the mixed phone divorce rate. I spend quite a bit of my professional time on the legal side of things so I have been following the different Apple v. Samsung cases around the world. You can see the full Apple U.S. complaint HERE which resulted in a $1B+ jury verdict. Samsung internal emails about copying Apple products really sunk them. Generally, in most case law nowadays, incriminating email plays a significant role so be warned.

Apple lost a case in the UK with the judge ruling that “Samsung tablets are not as cool as iPads” with the judge imposing an interesting penalty. Apple was required to post an apology with a font size of at least Arial 14.

Well, the Apple “apology” is out now and it is indicative of the sometimes juvenile Apple versus Samsung discussions I have heard. Here it is in Arial 14:

Samsung / Apple UK judgment
On 9th July 2012 the High Court of Justice of England and Wales ruled that Samsung Electronic (UK) Limited’s Galaxy Tablet Computer, namely the Galaxy Tab 10.1, Tab 8.9 and Tab 7.7 do not infringe Apple’s registered design No. 0000181607-0001. A copy of the full judgment of the High court is available on the following link www.bailii.org/ew/cases/EWHC/Patents/2012/1882.html.


That is the apology part. Here is the not so apologetic part:

In the ruling, the judge made several important points comparing the designs of the Apple and Samsung products:

“The extreme simplicity of the Apple design is striking. Overall it has undecorated flat surfaces with a plate of glass on the front all the way out to a very thin rim and a blank back. There is a crisp edge around the rim and a combination of curves, both at the corners and the sides. The design looks like an object the informed user would want to pick up and hold. It is an understated, smooth and simple product. It is a cool design.”

“The informed user’s overall impression of each of the Samsung Galaxy Tablets is the following. From the front they belong to the family which includes the Apple design; but the Samsung products are very thin, almost insubstantial members of that family with unusual details on the back. They do not have the same understated and extreme simplicity which is possessed by the Apple design. They are not as cool.”

That Judgment has effect throughout the European Union and was upheld by the Court of Appeal on 18 October 2012. A copy of the Court of Appeal’s judgment is available on the following link www.bailii.org/ew/cases/EWCA/Civ/2012/1339.html. There is no injunction in respect of the registered design in force anywhere in Europe.

However, in a case tried in Germany regarding the same patent, the court found that Samsung engaged in unfair competition by copying the iPad design. A U.S. jury also found Samsung guilty of infringing on Apple’s design and utility patents, awarding over one billion U.S. dollars in damages to Apple Inc. So while the U.K. court did not find Samsung guilty of infringement, other courts have recognized that in the course of creating its Galaxy tablet, Samsung willfully copied Apple’s far more popular iPad.

Clearly, like the iProducts, Apple has taken a simple apology to a whole new level with an added focus on the Apple user experience! 😎

Also see: A Brief History of Mobile: Gen 1 and 2


An AMS Reference Flow for Power Management Designs

An AMS Reference Flow for Power Management Designs
by Daniel Payne on 10-26-2012 at 5:42 pm

At DAC in June I visited and blogged about 30+ EDA and Semi IP companies, however I didn’t have time to watch the TowerJazz presentation in the Cadence Theater entitled: AMS Flow for Power Management Designs. Today I watched the 26 minute video and have summarized what I learned in this blog post. Continue reading “An AMS Reference Flow for Power Management Designs”


Simulation: Expert Insights into Modeling Microcontrollers @ Renesas DevCon

Simulation: Expert Insights into Modeling Microcontrollers @ Renesas DevCon
by Holly Stump on 10-25-2012 at 9:03 pm

Simulation: Expert Insights into Modeling Microcontrollers” was the recent panel hot topic at Renesas DevCon2012, featuring Paolo Giustoof GM, Mark Ramseyerof Renesas, Marc Serughettiof Synopsys, Jay Yantchevof ASTC / VWorks, and Simon Davidmannof Imperas.
Continue reading “Simulation: Expert Insights into Modeling Microcontrollers @ Renesas DevCon”


SoC emulation syncs up with SuperSpeed USB

SoC emulation syncs up with SuperSpeed USB
by Don Dingee on 10-25-2012 at 9:00 pm

They say what adds value is to take something difficult and make it look simple. USB looks so simple when it is done right, but designers know it can be one of the more tempermental features in an SoC, especially in the latest SuperSpeed incarnation.

Continue reading “SoC emulation syncs up with SuperSpeed USB”


A Brief History of Today’s Flexible ASIC Model

A Brief History of Today’s Flexible ASIC Model
by Daniel Nenni on 10-25-2012 at 8:10 pm

There’s been an interesting trend emerging the past couple of years; a gentrification, if you will, of the ASIC business. What was thought to be a dying supply chain model has re-emerged as a health and growing segment of the semiconductor industry. Recent figures from Gartner place 2012 ASIC revenue at around $24.4 billion on a growth rate of approximately 8%. Over the next five years, Gartner expects the ASIC segment to grow at compounded annual growth rate (CAGR) of 7.6%, outstripping the CAGR of ASSP’s at 4% and the semiconductor industry as whole at around 4.9%.

I’ve taken this “back to the future” retrospective because the health of today’s ASIC business is rooted in the history of the fabless semiconductor industry.

In the first article of this series, I sited how, in the early 1980’s, integrated device manufacturers — some of them the successful ASIC companies of their time — sold off their excess capacity to their poorer cousins, the start-up (read fabless) semiconductor companies who could not yet afford their own manufacturing capabilities. Then of course, Dr. Morris Chang brought TSMC to market in 1987, providing capacity and manufacturing technology for all comers and introduced the dedicate foundry model that really broke open semiconductor innovation.

Interestingly, Dr. Chang’s vision ushered in not only the semiconductor foundry but also the semiconductor fabless model, the semiconductor third party IP model, and today’s regenerated ASIC business.

One of these new ASIC companies, Global Unichip Corp., now known as GUC, started in 1998, 11 short years after TSMC first opened its doors and about the same time that the foundry industry gained recognition as a sustainable, viable model. The company was founded by a trio of some of the more influential luminaries of the Taiwan semiconductor. The group included Dr. Nicky Lu, IEEE Fellow and the Founder and Chairman of Etron, Dr. Y.L. Lin, a Professor at National Tsinghua University, and K.C. Shih, Founder and Board Member. Even back then, the founders recognized that the semiconductor industry was getting more and more complex and that system houses and fabless companies would not be able to manage the whole value chain.


Mr. Shih referred to his new company as a “design service company” because, at the time, design was the point of greatest complexity. In 2003, TSMC saw the complexity conundrum from the foundry perspective and gave credence to the emerging segment when they became a significant shareholder in GUC. Soon, other companies entered the space. Open Silicon, eSilicon and later Socle provided industry validation.

Growing semiconductor complexity, the demand for increased supply chain efficiency and the risk of costly product failures continued to erect significant barriers to innovation for the fabless, IDM and system house segments and created opportunity for the emerging Design Service companies who began to expand beyond their initial core competencies and into IP customization, test and packing and, in some cases, sophisticated logistics management.

Soon IDM’s began going “fab lite” as they transitioned beyond their process technology differentiation and it became obvious that foundry-partnered design service supply chains might be a better alternative. At the same time, systems houses began to insist on increased differentiation that could only be achieved through domain know-how, IP availability and, interestingly, a return to vertical integration. The confluence of these factors created the need for companies that provided capabilities well beyond design. Success, it became obvious, would come by providing a broad portfolio of “virtual” supply chain (or ASIC) services that could be accessed by individual companies at individual points of entry based upon their specific strengths and their specific needs. And so in 2011, GUC began providing this integrated service set under the banner of its Flexible ASIC Model[SUP](TM)[/SUP][SUB].[/SUB]

Today, GUC’s Flexible ASIC Model covers three integrated supply chain areas: SoC integration, implementation methodologies and integrated manufacturing. Taken together, they bring today’s systems houses, IDMs and fabless semiconductor companies access to a foundry design environment that reduces cycle time, IP and design methodologies that lower the barriers to innovation and integrated technology availability (design, foundry, assembly and test) that speeds time-to-market.

Interesting, the trends that emerge from development of the fabless semiconductor industry continue today and the maturation of Flexible ASIC model appears to be just the next stage in the history of continued semiconductor innovation.



Brian Bailey Interviews Kathryn Kranen

Brian Bailey Interviews Kathryn Kranen
by Paul McLellan on 10-25-2012 at 6:23 pm

Brian Bailey at EETimes has an interesting interview with Kathryn Kranen. He says that the interview will be published in installments but the first one is up here. This first installment is mostly about how long-lived EDA companies (and others) have become since it takes a long time to build up enough revenue to be able to IPO.

She contrasts how she has worked at Jasper and earlier companies with Jim Hogan’s “run lean, don’t raise too much money” approach. Each time she raised over $30M. Her view is that small companies don’t scale for success. If a company with hundreds of designers adopts a product from and EDA company then the EDA company has to be of a scale to handle that, international offices, lots of AEs and so on. A small company can develop some technology and establish some level of credibility but then it has to be acquired by a company with a large channel to scale.

Go read the whole thing.