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BLDC motor control kit targets power savings

BLDC motor control kit targets power savings
by Don Dingee on 05-03-2016 at 12:00 pm

We tend to focus on connectivity and sensors for the IoT, however there is a third element to what I call the “Edge Device Triad” that is just as important: actuators. Making things move with microcontrollers (MCUs) is a science in and of itself. For small size and low weight combined with decent mechanical power, designers are opting for brushless DC (BLDC) motors in many applications.

BLDC motor control is complex. There are numerous variables and approaches to deliver precise motion with efficiency. Fortunately, an ultra-low-power ARM processor core such as a Cortex-M0+ provides enough computational power to run advanced algorithms, and there are many Cortex-M0+ MCUs out there. The question for how good an MCU is at BLDC motor control comes down to how capable its integrated peripherals are, and how well performance can be visualized and optimized.
Low power motor control isn’t just a nice thing to have – in some areas, regulation is moving in. I was recently at the IEEE Electronic Design Process Symposium in Monterey, and one of the examples cited was Japan’s Top Runner program. There are Top Runner energy consumption reports on every type of major home appliance and many smaller appliances. We were discussing printers, and that report calls for an efficiency improvement for devices shipped in FY2017 of 41.6% compared to the FY2007 baseline.

Printers are just one application for BLDC motors. Many other common devices are turning to BLDC motor implementations, such as handheld power tools, personal appliances including shavers and toothbrushes, robotic vacuums, drones and remote control toys, low-voltage pumps, and more. Often these devices are battery powered, with recharging or battery replacement requirements a key metric in usability and overall customer satisfaction.

Not all of us are motion control experts. Finding the right combination of pieces to quickly execute a BLDC motor control design can be challenging. Atmel, a wholly owned subsidiary of Microchip Technology Inc., has been at work kitting the pieces needed, starting with their SAMD21 MCU. We first covered this part about two years ago (in my blog “What’s not quite MCU, and not quite SoC?”), noting the high speed bus matrix and the deep roster of peripherals. The timer blocks support dead-time insertion and complimentary outputs needed for motor drive. The analog subsystem integrates accurate internal references for precision. A unique feature, the Atmel Event System, focuses on real-time reaction to events without imposing CPU interrupts.


The SAMD21 is at the center of the new ATSAMD21BLDC24V-STK platform, pictured above. The kit hardware includes the MCU board, a 24V motor driver board, an AC/DC adapter for power, and a small BLDC motor.

Software support for the ATSAMD21BDLC24V-STK is what takes the complexity away for designers. Atmel Studio comprehends the hardware for development and debug. Within the Atmel START and Atmel Software Framework are example projects dedicated to BLDC motor control. Full source code is provided for sensorless field-oriented control (FOC) and sensored block commutation, so developers can pull the kit out of the box and start talking to a motor. The Atmel Data Visualizer lets users control motor speed and direction while monitoring speed and power consumption via a GUI.


Atmel is extending this motor control kit concept to other family members soon, including the SAMC21 and SAMD21L. They are also working on additional motor control algorithms, and a new high-voltage motor control interface with up to 400V drive capability. Atmel currently supports safety requirements with a certified IEC 60730 Class B library.

We’ve been discussing the trend away from “just chips” (although those are really important) and toward more system-centric design enablement. We expect this to become table stakes, where MCU and SoC vendors will have to assemble and optimize hardware/software combinations for specific vertical applications to secure design-ins. It’s good to see Atmel supporting this part of my Edge Device Triad helping make actuators more efficient. Power savings add up quickly when scaled across millions of devices, and designers are well-served to be proactive in lowering power consumption.

More on the Atmel ATSAMD21BDLC24V-STK is available online.


Here’s the advantage that keeps Silicon Valley ahead of the world

Here’s the advantage that keeps Silicon Valley ahead of the world
by Vivek Wadhwa on 05-03-2016 at 7:00 am

A trait shared by the fastest growing and most disruptive companies in history – Google, Amazon, Uber, AirBnb, and eBay – is that they aren’t focused on selling products, they are building platforms. The ability to leverage the network effects of a platform is something that the technology industry learned long ago – and perfected. It is what gives Silicon Valley an unfair advantage over competitors in every industry; something that is becoming increasingly important as all information becomes digitized.

A platform isn’t a new concept, it is simply a way of building something that is open, inclusive, and has a strategic focus. Think of the difference between a roadside store and a shopping center. The mall has many advantages in size and scale and every store benefits from the marketing and promotion done by others. They share infrastructure and costs. The mall owner could have tried to have it all by building one big store, but it would have missed out on the opportunities to collect rent from everyone and benefit from the diverse crowds that the tenants attract.

Apple learned this the hard way in the 1980s when it created the first versions of the Macintosh. It built its own proprietary, closed, hardware, operating system, and applications. Bill Gates, on the other hand, realized that key to power and profit was the operating system and a thriving ecosystem. He designed Microsoft Windows as an open system in which other players could provide the hardware and software. The more programs that ran on Windows, the more users wanted it, and therefore more developers created applications. Windows became a near monopoly the 90s—while Apple came close to bankruptcy.

Fortunately for Apple, by 2007, Steve Jobs had figured out Microsoft’s advantage. He built the iPhone App Store and iTunes as open platforms on which other players could provide content. The top five mobile phone carriers—Nokia, Samsung, Motorola, Sony Ericsson, and LG—had owned 90 percent of the industry’s profits. Yet Apple was able to leap ahead and capture literally all of this.

The power of platforms is explained in a new book, Platform Revolution: How Networked Markets are Transforming the Economy and How to Make Them Work for You, byGeoffrey Parker, Marshall Van Alstyne, and Sangeet Choudary. The authors show how platform businesses bring together producers and consumers in high-value exchanges in which the chief assets are information and interactions. These interactions are the creators of value, the sources of competitive advantage.

Apple was able to connect app developers with app users in a market in which both sides gained value and paid it a tax. As the number of developers increased so did the number of users. This created the “network effect” — a process in which the value snowballs as more production attracts more consumption and more consumption leads to more production.

Just as malls have linked consumers and merchants, newspapers have long linked subscribers and advertisers. What has changed is that technology has reduced the need to own infrastructure and assets and made it significantly cheaper to build and scale digital platforms.

Traditional businesses, called “pipelines” by Parker, Van Alstyne, and Choudary, create value by controlling a linear series of processes. The inputs at one end of the value chain, materials provided by suppliers, undergo a series of transformations to make them worth more. Apple’s handset business was a classic pipeline, but when combined with the App Store, the marketplace that connects developers with users, it became a platform. As a platform it grew exponentially because of the network effects.
The authors say that the move from pipeline to platform involves three key shifts:

[LIST=1]

  • From resource control to orchestration. In the pipeline world, the key assets are tangible – such as mines and real estate. With platforms, the value is in the intellectual property and community. The network generates the ideas and data – the most valuable of all assets in the digital economy.
  • From internal optimization to external interaction. Pipeline businesses achieve efficiency by optimizing labor and processes. With platforms, the key is to facilitate greater interactions between producers and consumers. To improve effectiveness and efficiency, you must optimize the ecosystem itself.
  • Value the ecosystem rather than the individual. Rather than focusing on the value of a single customer as traditional businesses do, in the platform world it is all about expanding the total value of an expanding ecosystem in a circular, iterative, and feedback-driven process. This means that the metrics for measuring success must themselves change.

    Companies such as Walmart, Nike, John Deere, and GE are working towards building platforms in their industries. John Deere, for example wants to be a hub for agricultural products. But not every industry is ripe for platforms because the underlying technologies and regulations may not be there yet.

    In a paper in Harvard Business Review,on “transitional business platforms” Kellogg School of Management professor Robert Wolcott illustrates the problems that Netflix founder Reed Hastings had in 1997 in building a platform. Hastings had always wanted to provide on-demand video, but the technology infrastructure just wasn’t there when he needed it. So he started by building a DVDs-by-mail business — while he plotted a long-term strategy for today’s platform. According to Wolcott, Uber has a strategic intent of providing self-driving cars, but while the technology evolves it is managing with human drivers. It has built a platform that enables rapid evolution as technologies, consumer behaviors, and regulations change.

    Building platforms requires a vision, but does not require predicting the future. What you need is to understand the opportunity to build the mall instead of the store and be flexible in how you get there.

    For more, follow on Twitter: @wadhwa and visit my website: www.wadhwa.com


  • Cadence loads up on MACs for vision with CNNs

    Cadence loads up on MACs for vision with CNNs
    by Don Dingee on 05-02-2016 at 4:00 pm

    For vision DSP IP running convolutional neural networks (CNNs), a big driver of performance is increasing the bits processed per cycle with parallel MACs. Tom Simon did a great job in recent posts of introducing CNNs at a high level, so I’ll look at what is architecturally behind Cadence’s latest announcement: the Tensilica Vision P6 DSP. Continue reading “Cadence loads up on MACs for vision with CNNs”


    How to Deal With Seven Design Closure Issues

    How to Deal With Seven Design Closure Issues
    by Tom Simon on 05-02-2016 at 12:00 pm

    The challenge of tracking design progress is a shared problem for individual designers, team leaders, and project managers. At each level the ability to step back from just reviewing error log files and seeing the arc of the whole design as it moves forward is valuable. The difficulty of seeing the whole picture is exacerbated when design teams for a project are scattered around the world. To better understand the nature of the problem, Consensia surveyed a number of their customers to uncover what had been their biggest delay factors in getting to design closure. They learned some pretty interesting things.

    First let’s back up and talk a little bit about Consensia. They are a channel partner with Dassault, which offers a suite of tools for managing design flows. A big part of the value of a design management system is the ability to track progress of the design process. Consensia delivers solutions based on Pinpoint, which offers a view of the design process that is accessible across design teams, project teams and geographies.

    So, what did they learn from the survey? First off, designs have a tendency to appear 95% done for about 30% of the design cycle. Another big hindrance is trying to figure out where to start when confronted with hundreds of timing violations. The next problem customers had encountered was being limited in the number of “what if” experiments they were able to try given looming tape out deadlines. Another issue that came up repeatedly was communication and time zone barriers between ASIC and layout designers. Late stage power and signal integrity issues also were mentioned. Rounding out the list was needing to take time away from design to prepare for design reviews and the necessity of tying up expensive and limited EDA tools just to view and brainstorm solutions to issues.

    Before talking about how these problems might be resolved, let’s dig in a bit and look at how Consensia’s Pinpoint works. It offers a tool agnostic design collaboration and analysis capability. Pinpoint can read design and layout data. It can parse and understand tool results from each step in the design flow. Most importantly it is web based and accessible by all the stake holders in the design process. Due to its ability to read reports and data from a variety of tools, it affords ways of looking at the design that are not available from the individual tools in the flow. Because it is collaborative the information it has aggregated can be seen and used across geographic and functional boundaries.

    Going back to the list of obstacles, using real metrics from tool runs visible, project status can be observed much more accurately. This should mean fewer surprises when project milestones are due. As for where to start when confronted with a mass of timing violations, Pinpoint’s timing report for the whole design can enable a structured approach to timing closure. Also visualization of violating paths on the layout can lead to design insights that can greatly facilitate resolutions.

    Pinpoint also lets engineers keep track of tool runs and their input data versions, making it easier to hone in on the best results. Because it is web based, Pinpoint allows full access to design analytics anywhere it is needed. This is a huge benefit when information on design progress and convergence is needed for design reviews and internal discussions. All of this is accomplished without the need to tie up EDA tool licenses just to review design status.

    Pinpoint presents the data from tool runs and design progress visually and interactively to help establish an extremely accurate assessment of all the open issues, making tracking design progress easier and more reliable. Detailed reports including timing and physical verification are available. Pinpoint also graphs design metrics over time, so that trends in the design are evident.

    Consensia heard feedback from their customers that they have seen savings of 12 to 18% in design time. It would seem that applying design aware analytics to the semiconductor design process is valuable. For more information on Pinpoint from Censensia, take a look at their website.


    From Simulation to Emulation: 3 Steps to a Portable SystemVerilog/UVM Testbench

    From Simulation to Emulation: 3 Steps to a Portable SystemVerilog/UVM Testbench
    by Hans van der Schoot on 05-02-2016 at 7:00 am

    If your team is building large, complex designs that require millions of clock cycles to fully verify, you need both simulation and emulation.

    Using emulation with simulation accelerates performance for dramatically reduced run times.
    Continue reading “From Simulation to Emulation: 3 Steps to a Portable SystemVerilog/UVM Testbench”


    Mind The Gap – Boarding the Silicon Photonics Packaging Train

    Mind The Gap – Boarding the Silicon Photonics Packaging Train
    by Mitch Heins on 05-01-2016 at 8:00 pm


    I’ve been doing a lot of reading on silicon photonics lately and I’ve come to realize that while there is much written on the development of individual silicon photonic components and devices (modulators, photo detectors, optical amplifiers and such) that much of the cost and therefore chances of economic success of integrated photonics solutions resides not in the silicon but in packaging of these solutions. Before the photonics platform can be used photonic ICs (PICs) must be integrated to their electrical IC (EIC) counterparts and the rest of the system.

    One of the biggest challenges of this integration is getting light on and off the PIC from optical fiber. For integrated photonics this is typically done either through edge couplers or grating couplers as shown in figure 1. The tricky (and costly) part comes in ‘minding the gap’ between the relatively large optical mode of fiber to the very small optical mode of a SOI on-chip wave-guide. To put this into perspective, the diameter of a single-mode lensed telecom fiber for 1550nm light is ~3um. This must be matched up to a SOI-waveguide mode with dimensions of ~ 220nm x 450nm. That’s an area difference of almost 2 orders of magnitude (~7 million nm[SUP]2[/SUP] vs 99,000 nm[SUP]2[/SUP]). More challenging is that SOI wave-guides typically only support TE-polarized modes of light an
    d the light coming in from a fiber is usually unknown and unstable requiring a mode convertor to clean up the signal before entering the waveguide. The 1db alignment tolerance for a typical edge-coupler is sub-micron (~ +/- 500nm) requiring time consuming and expensive active alignment during packaging. Additionally, these couplers usually require laser-welding to secure the lensed-fiber to the PIC as epoxy bonding suffers from small alignment drifts that would not be tolerable at these dimensions. With laser-welding comes the need for more expensive packages to mitigate thermal expansion on the optical alignment. Peter O’Brien and the packaging group from Tyndall National Institute in Cork, Ireland do a great job of explaining all of the nuances of this and more in chapter 7 of the book, Silicon Photonics III. The end result being that while edge couplers are the standard for the packaging of III-V laser devices and do a good job reducing insertion loss and giving more broadband coupling, they add a substantially increased packaging cost for integrated PICs due to their stringent alignment requirements.

    The alternative to edge couplers are grating couplers that use diffraction gratings to couple a near incident fiber-mode to the wave-guide mode (figure 2). They are typically designed as a 10um x 10um periodic array of trenches, partially etched into the silicon layer. The trenches are usually curved to focus the light to the SOI-waveguide reducing the need for long space-consuming taper structures and can be designed to do double duty by taking care of the required polarization cleanup. The 1db alignment tolerance for these couplers are ~ +/- 2.5um. While still challenging, the process of “minding the gap” here is greatly simplified and much less costly compared to edge couplers. Grating couplers have the added benefit that they are fully CMOS flow compatible and allow for wafer-scale optical access at any point on the PIC surface enabling inline testing and characterization of the PIC before dicing.

    The biggest issue with grating couplers is their relatively high insertion loss. A standard grating coupler in 220nm SOI is -3db which equates to a 50% reduction in the transmitted power. In MPW runs from imec and CEA-Leti, users have experienced insertion losses as high as -5db. Several research groups are working on this and have reported devices in the labs using bottom-reflectors that have insertion loss down to -1db but these devices have not yet seen production. The other major concern for grating couplers is the need for near incident light making for bulky and delicate vertical connections from fiber to the PIC. To “mind this gap”, a quasi-planar approach (figure 7.4) has been developed in which the fiber lies flat on the surface of the PIC with a 40[SUP]0[/SUP] polished facet that directs the fiber-mode onto the grating coupler at the correct angle. Due to their relaxed alignment constraints these connections can be made with less expensive epoxy bonding. This is especially helpful for fiber-array connections that have multiple fiber-channels in the same connector where you can amortize the cost to connect multiple channels across one alignment task. As an added bonus, grating couplers can also be used with VCSELs (vertical cavity surface-emitting lasers) that are directly flip-chipped and bonded over the PIC couplers.

    In the end, the best fiber-coupling solutions for a given PIC is strongly application and cost-dependent, but no matter what you do, to make your PIC design successful you’ll need to “mind the packaging gap” while boarding your silicon photonics train.


    Why Should Companies Care about Internet of Things Services?

    Why Should Companies Care about Internet of Things Services?
    by Bill McCabe on 05-01-2016 at 4:00 pm

    As with any new technology, businesses will need to find quantifiable benefits in the Internet of Things before the concept is embraced and implemented. It could be argued that connected devices are already being adopted on a wide scale: companies like Microsoft, Amazon, Qualcomm, IBM, and others already see IoT as a core part of their businesses. Even so, there are still some, especially small to medium sized businesses, that are weighing up the costs and benefits of ultra-connectivity in the world of the Internet of Things.

    You do not have to dig deep to see why IoT is important. Business Insider’s research division, BI Intelligence, has predicted that IoT will become the largest device market in the world over the next five years. Most analysts predict market value will reach in to the trillions, with possibly $7 trillion of total value by 2020. Any way you slice the pie, billions of dollars are on the table. These figures are promising for businesses directly involved in the manufacture and design of device services and hardware, but what about the companies that will purchase these technologies to incorporate them into operations?

    Perhaps the single largest benefit will be in how Internet of Things devices can lower costs. The manufacturing sector provides an ideal case scenario. Machine to Machine (M2M) systems will allow for machinery to become more efficient, and more autonomous. Take a production line that was previously labor intensive. Sensors relying on IoT can receive orders, initiate fabrication, sign off work orders, and even package products using IoT, and with little human interaction. Even non-automated manufacturing will benefit. Orders can be taken from anywhere in the world, transferred through the cloud, and delivered to remote manufacturing facilities. These systems can collect valuable analytics that can benefit accounting, inventory management, and even resource procurement.

    While this type of IoT will directly benefit businesses in manufacturing, it will also create new opportunities for project managers, engineers, and IT professionals who will be necessary in designing, implementing, and supporting these systems. It even creates the role of Chief Internet of Things Officer, the CIOTO, tasked with managing a network of connected systems, and connecting their efforts back to business goals.

    Because IoT provides immediate data collection, businesses in all industries will benefit from improved decision making. Being able to analyze and distribute intelligence faster means that tedious data collection will be a thing of the past. Decisions can be made faster, and in some cases can be automated. What this spells for enterprise is, in essence, better decisions based on better data.

    Hong Kong International Airport, and other mega-airports around the world, already rely on RFID technology to track luggage and freight throughout their sites. This enables luggage to be delivered by machine to the correct gate, the correct passenger carousel, or to the correct airliner, train, or delivery vehicle. Items are tracked via computer, and managed from a central control point. This reduces hands on management and labor costs. HKIA spent $50 million to develop the initial infrastructure, but widespread adoption of this IoT based technology could save the industry $760 million per year, according to the International Air Transport Association.

    Imagine how a similar system could benefit a SMB. Goods delivery could be RFID or barcode tracked on handheld scanners. This tracking information could be uploaded to a cloud solution, from where dispatchers, couriers, and clients could track the location and progress of a delivery. These are the kind of innovations that are driving IoT, and making it a necessary technology in a market where cost and efficiency is key, and where end users and consumers demand constant, easily accessible information.

    The opportunities are there for businesses who adopt IoT today. The benefits exist whether they seek to improve manufacturing efficiency, streamline logistics processes, or even provide new ways for customers to interact and receive information. In the growing world of IoT, the question is not why should we care, but is rather, can you afford not to?

    Please give us your feedback or share how the Internet of Things has touched your business below.

    Posted in IoT Basics | Tagged interact and receive information, Internet of Things, IoT innovations, M2M, Machine to Machine systems, manufacturing efficiency, quantifiable benefits, streamline logistics processes

    For more information please review our website at www.internetofthingsrecruiting.com


    Semiconductor capital spending slow in 2016

    Semiconductor capital spending slow in 2016
    by Bill Jewell on 05-01-2016 at 12:00 pm

    The outlook for semiconductor capital expenditures (capex) in 2016 is weak. Gartner’s January 2016 forecast called for a decline of 4.7%. IC Insights in February projected a 0.8% decline. The table below shows the Gartner forecast along with the capex forecasts from the top three spenders (Intel, Samsung and TSMC) which account for about half of total industry capex. Intel is forecasting $9.5 billion in capex in 2016. This is up 30% from 2015, but below Intel’s $10B plus in capex in 2011 through 2014.

    TrendForce estimates Samsung’s capex will be $11.5 billion in 2016, which would be tied with 2013 as the lowest level since 2010. TSMC plans a 17% increase in capex in 2016 to $9.5 billion, in line with TSMC’s record $9.7 billion in capex in 2013. Based on Gartner’s forecast and the estimates for the top three, the implied capex for the rest of the industry is a 15% decline. Using IC Insights forecast for a 0.8% decline in 2016 capex would mean the rest of the industry would see a 7% decline.

    [TABLE] align=”center” style=”width: 500px”
    |-
    | colspan=”9″ style=”width: 100%; height: 31px; text-align: center” | Semiconductor Capital Expenditures, US$B
    |-
    | style=”width: 17.82%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 9.08%; height: 12px” |
    | style=”width: 18.62%; height: 12px” |
    |-
    | style=”width: 17.82%; height: 19px” |
    | style=”width: 9.08%; height: 19px” |
    | style=”width: 9.08%; height: 19px” |
    | style=”width: 9.08%; height: 19px” |
    | style=”width: 9.08%; height: 19px” |
    | style=”width: 9.08%; height: 19px” |
    | style=”width: 9.08%; height: 19px” | Fcst.
    | style=”width: 9.08%; height: 19px” |
    | style=”width: 18.62%; height: 19px” |
    |-
    | style=”width: 17.82%; height: 25px” |
    | style=”width: 9.08%; height: 25px” | 2011
    | style=”width: 9.08%; height: 25px” | 2012
    | style=”width: 9.08%; height: 25px” | 2013
    | style=”width: 9.08%; height: 25px” | 2014
    | style=”width: 9.08%; height: 25px” | 2015
    | style=”width: 9.08%; height: 25px” | 2016
    | style=”width: 9.08%; height: 25px” | Change
    | style=”width: 18.62%; height: 25px” | Source
    |-
    | style=”width: 17.82%; height: 25px” | Total
    | style=”width: 9.08%; height: 25px” | 67.4
    | style=”width: 9.08%; height: 25px” | 58.9
    | style=”width: 9.08%; height: 25px” | 57.1
    | style=”width: 9.08%; height: 25px” | 65.0
    | style=”width: 9.08%; height: 25px” | 62.3
    | style=”width: 9.08%; height: 25px” | 59.4
    | style=”width: 9.08%; height: 25px” | -5%
    | style=”width: 18.62%; height: 25px” | Gartner
    |-
    | style=”width: 17.82%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 18.62%; height: 25px” |
    |-
    | style=”width: 17.82%; height: 25px” | Intel
    | style=”width: 9.08%; height: 25px” | 10.8
    | style=”width: 9.08%; height: 25px” | 11.0
    | style=”width: 9.08%; height: 25px” | 10.7
    | style=”width: 9.08%; height: 25px” | 10.1
    | style=”width: 9.08%; height: 25px” | 7.3
    | style=”width: 9.08%; height: 25px” | 9.5
    | style=”width: 9.08%; height: 25px” | 30%
    | style=”width: 18.62%; height: 25px” | company
    |-
    | style=”width: 17.82%; height: 25px” | Samsung
    | style=”width: 9.08%; height: 25px” | 12.1
    | style=”width: 9.08%; height: 25px” | 12.3
    | style=”width: 9.08%; height: 25px” | 11.5
    | style=”width: 9.08%; height: 25px” | 13.6
    | style=”width: 9.08%; height: 25px” | 13.0
    | style=”width: 9.08%; height: 25px” | 11.5
    | style=”width: 9.08%; height: 25px” | -11%
    | style=”width: 18.62%; height: 25px” | TrendForce
    |-
    | style=”width: 17.82%; height: 25px” | TSMC
    | style=”width: 9.08%; height: 25px” | 7.3
    | style=”width: 9.08%; height: 25px” | 8.3
    | style=”width: 9.08%; height: 25px” | 9.7
    | style=”width: 9.08%; height: 25px” | 9.5
    | style=”width: 9.08%; height: 25px” | 8.1
    | style=”width: 9.08%; height: 25px” | 9.5
    | style=”width: 9.08%; height: 25px” | 17%
    | style=”width: 18.62%; height: 25px” | company
    |-
    | style=”width: 17.82%; height: 25px” | Big 3 Total
    | style=”width: 9.08%; height: 25px” | 30.2
    | style=”width: 9.08%; height: 25px” | 31.6
    | style=”width: 9.08%; height: 25px” | 31.9
    | style=”width: 9.08%; height: 25px” | 33.2
    | style=”width: 9.08%; height: 25px” | 28.4
    | style=”width: 9.08%; height: 25px” | 30.5
    | style=”width: 9.08%; height: 25px” | 7.3%
    | style=”width: 18.62%; height: 25px” |
    |-
    | style=”width: 17.82%; height: 25px” | % of Total
    | style=”width: 9.08%; height: 25px” | 45%
    | style=”width: 9.08%; height: 25px” | 54%
    | style=”width: 9.08%; height: 25px” | 56%
    | style=”width: 9.08%; height: 25px” | 51%
    | style=”width: 9.08%; height: 25px” | 46%
    | style=”width: 9.08%; height: 25px” | 51%
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 18.62%; height: 25px” |
    |-
    | style=”width: 17.82%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 9.08%; height: 25px” |
    | style=”width: 18.62%; height: 25px” |
    |-
    | style=”width: 17.82%; height: 25px” | Others
    | style=”width: 9.08%; height: 25px” | 37.2
    | style=”width: 9.08%; height: 25px” | 27.3
    | style=”width: 9.08%; height: 25px” | 25.2
    | style=”width: 9.08%; height: 25px” | 31.8
    | style=”width: 9.08%; height: 25px” | 33.9
    | style=”width: 9.08%; height: 25px” | 28.9
    | style=”width: 9.08%; height: 25px” | -15%
    | style=”width: 18.62%; height: 25px” |
    |-

    The weak outlook in semiconductor capex is reflected in the projections for semiconductor manufacturing equipment. Semiconductor Equipment and Materials International (SEMI) in December 2015 forecast a 1.4% increase in equipment sales in 2016. Gartner in January 2016 projected a 2.5% decline. The chart below shows the latest combined data on semiconductor manufacturing equipment bookings and billings from SEMI and SEAJ (Semiconductor Equipment Association of Japan) for 1[SUP]st[/SUP] quarter 2016.

    1Q 2016 billings were US$6.6 billion, down 7% from a year ago. Bookings were US$7.5 billion, up 3% from a year ago. The book-to-bill ratio of 1.13 points to growth in billings in the next few months. If this trend continues, year 2016 billings for semiconductor manufacturing equipment could reach the SEMI forecast of 1.4% growth.

    SEMI and SEAJ data shows equipment sales hit a peak of $42.8 billion in 2007. Sales declined severely in the industry downturn, hitting a low of $15.9 billion in 2009. Sales rebounded to a new peak of $43.5 billion in 2011. Over the last four years, sales have ranged between $32 billion and $37 billion. Sales were $36.5 billion in 2015. Sales by region have varied significantly comparing the 2007 and 2011 peaks to 2015. The chart below shows SEMI/SEAJ data of semiconductor manufacturing equipment sales by region.

    Taiwan is the largest regional market with sales of around $10 billion. The vast majority of sales in Taiwan are to wafer foundries such as TSMC and UMC. South Korea is a close second, with sales of $7 billion to $8 billion. Sales in South Korea were slightly higher than in Taiwan in 2011. South Korea sales are primarily to memory companies Samsung and SK Hynix. Japan sales declined from $9.3 billion in 2007 to $5.5 billion in 2015. Toshiba, Sony and Renesas are the major customers in Japan. North America (primarily the U.S.) sales went from $6.6 billion in 2007 to $9.3 billion in 2011, making North America the largest region in 2011. Sales dropped to $5.1 billion in 2015. Intel is the largest buyer of semiconductor equipment in North America, with Micron Technology second. China was the only region to see growth from 2007 to 2015 with sales increasing 68% to $4.9 billion. Europe and other regions each saw sales drop about a third from 2007 to 2015.

    Despite the shifting of the semiconductor market to China and other emerging Asian countries, the market for semiconductor manufacturing equipment remains dominated by Taiwan, South Korea, Japan and North America – the sites of the largest semiconductor manufacturing companies. These companies prefer to make most of their multi-billion-dollar wafer fab investments close to home. China has seen strong growth in the equipment market, but China’s growth rate should slow over the next few years. China should pass Japan and North America in the next few years, but is not likely to pass Taiwan or Korea before the end of the decade.


    Qualcomm’s New X16 LTE Modem Delivers Gigabit LTE And A Scalable Architecture

    Qualcomm’s New X16 LTE Modem Delivers Gigabit LTE And A Scalable Architecture
    by Patrick Moorhead on 05-01-2016 at 7:00 am

    Qualcomm has been the global unit and revenue market share leader for years in modem technologies used in smartphones, tablets, PCs and IoT (Internet of Things). One of the reasons they have maintained this lead for so long is that they are typically first to market with new generations of modems. Today at their investor conference, they announced their latest and greatest LTE modem capable of gigabit-class speeds, specifically 1 Gbps, which translates to “Category (Cat.) 16” LTE according to the 3GPP standards.

    This is also the first modem that fits into the class of ‘LTE Advanced Pro’, which is the next step in LTE modem technologies and is a move towards the 5G future with gigabit-class connectivity. This new modem also brings a lot of industry firsts, even for Qualcomm, which include the first Cat. 16 LTE modem, the first LTE Advanced Pro modem, the first modem to support LAA (Licensed-Assisted Access) and the first discrete modem built on the 14nm FinFET process as well as a new modem architecture.

    Why we need faster modems
    The need for faster modem speeds is driven by “data density”. The growth of media consumption and content creation has driven the need for a gigabit class LTE modem. The resolutions of the phone and tablet displays have now reached beyond 1080P or 2K resolution compared to 480P in phones like the Galaxy S2from five years ago. Over the past five years, these same phones have seen their cameras’ capabilities increase drastically from 5 megapixel photos and 720P video to 16 megapixel photos and 4K video. Just in terms of video alone, this means an 8x increase of resolutions and approximately the same amount of data usage. These increased resolutions have driven users to desire more and more download and upload speeds which means they are using their operators’ networks more than ever before. There has also been an explosion of video sharing and streaming applications like Periscope, Vine, YouTube, WeChat, Instagram and Snapchat. This increased demand can be clearly seen as most of the carriers have significantly increased their data caps across the board or kept their unlimited plans.

    I am also thinking how this same technology could replace cables to the home and business.


    Up to 1 Gbps 50% faster over prior generation
    The new X16 LTE modem delivers peak speeds of up to 1 Gbps, an increase of over 65% over the previous generation using the same spectrum, the Snapdragon X12 LTE modem capable of 600 Mbps. Currently, only Samsung Electronics has announced any modems that can reach the speeds of the last generation Snapdragon X12 LTE modem which is also inside of the Snapdragon 820 SoC. Samsung’s announcement means that some of their phones this year will finally catch up to Qualcomm’s modems from last year. In fact, Qualcomm announced it originally in November, 2014 as a Cat. 10 modem, but announced its upgrade to Cat 12/13 along with support for LTE-U and 4×4 MIMO in September, 2015. They’ve already outdone themselves four months later with the Snapdragon X16 LTE modem. Qualcomm’s cadence in modems has seen the company increase download speeds roughly 10x over the course of the last 5 years alone.

    These kinds of speeds can also enable entirely new use cases for wireless technologies, and the higher throughput and lower latency can allow for use cases that we haven’t even thought of yet. The reality is that these kinds of speeds are really what people were imagining originally when LTE was originally introduced as a ubiquitous wireless technology. You could bring the full speed of the wired internet with you anywhere you went, and now, wireless internet speeds are outpacing wired internet speeds in many places. This could mean the ability to experience virtually lag free remote desktop environments as well as video streaming as demanding as 360-degree VR HD video.

    How consumers get 1 Gbps from carriers
    The new Snapdragon X16 LTE modem achieves 1 Gbps speeds by using only three carriers at the same time, even though it can deliver such speeds with four carriers as well if 2×2 MIMO (multiple input, multiple output) is the only antenna configuration available. The three carrier configuration (3X carrier aggregation) uses 4×4 MIMO on the first two carriers and 2×2 MIMO on the third, making achieving such speeds much more realistic since having four 20 MHz blocks of spectrum is going to be extremely difficult in most geographies. The end result with these different carrier and antenna configurations is that ultimately you get 10 streams of LTE data, each carrying 100 Mbps. These speeds translate to 3GPP Cat. 16 downlink speeds of 1 Gbps, while the uplink, via 2×20 MHz CA plus 64-QAM is 150 Mbps or triple of most upload available today. The new modem also brings support for LTE-U and LAA, making the use of unlicensed spectrum easier and more possible across the world using one modem. And if all of that wasn’t enough, it also adds support for the new 3.5 GHz band of licensed spectrum, which is a new 3GPP approved band.

    New, scalable modem architecture “reduces 2/3rd development cycle”
    In addition to all of these new speeds and capabilities, Qualcomm’s new Snapdragon X16 LTE modem features an entirely new modem architecture which is designed to improve the company’s R&D efficiency. This new architecture allows for Qualcomm’s modems to be hardware and software scalable from the high-end to the low-end discrete modems. This change is intended to translate into delivering new products top to bottom in only one R&D cycle for all versions of Qualcomm’s discrete modems as well as shorter time to CS (commercial sampling). All of this means that Qualcomm is intending to spend less time and money developing their top to bottom modem stacks which could obviously be better for them and their customers relying on them to create faster modems at lower costs. With the X16 architecture, Qualcomm now has a modem for virtually every application all the way down to IoT and the company says it delivered it in one cycle, not three.

    Qualcomm will not say what the building blocks are in the new architecture, but they are quick to say that these aren’t common compute cores as was introduced with NVIDIA’s now redeployed Icera modem division. Competitively, if Qualcomm can deliver what they say they can with the new architecture, this could put some serious pain on their discrete modem competitors because the mid-range and low end modems could arrive one to two years earlier on a leading edge node. Think about that. I’ll be keeping a close eye on Qualcomm’s execution, the competitive reaction and if and how this impacts companies like Huawei, Intel, Samsung Electronics and even MediaTek.

    1 Gbps speeds require new RF

    The new modem will also be accompanied by a brand new RF transceiver which is also the world’s first gigabit-class LTE transceiver. Other than the fact that Qualcomm has introduced 1 Gbps downlink (DL) speeds, they’ve also added support for 256-QAM and 4×4 MIMO, which are necessary to achieve such speeds. In fact, in terms of configuration this RF transceiver can support up to 4x DL CA (80 MHz total) as well as 2x UL (upload) CA (40 MHz total). However, the 2x UL CA is only possible with 3x DL CA enabled, not 4x DL CA. It supports all 3GPP bands, including 3.5 GHz which is the newest band. It also has 5GHz LTE-U support and location support for GPS, Glonass, Galileo and BeiDou, making it among the most comprehensive global positioning chips on earth as well. And even with all of those new features, Qualcomm says they have managed to implement fewer connections between the transceiver and the modem with fewer wires and less board space, making it easier overall to implement.

    Already sampling

    What makes this announcement all the more impressive is that according to Qualcomm, the Snapdragon X16 LTE modem has already sampling to customers and shipping in commercial devices by the second half of 2016, as in, less than a year. This also means that there will be networks that can support this modem’s capabilities around that time as well, meaning that we could see gigabit-class LTE networks as soon as this year. The expectation is that this modem will land inside of broadband devices and mobile routers first, considering the antenna complexity and how difficult that will be to implement in phones in such a short period of time. But there is still a very good chance that we will eventually see the X16 LTE modem in phones next year.

    Wrapping up
    There are a lot of people wondering what exactly Qualcomm has been doing since they announced the X12 LTE modem and it looks like they are reaffirming their modem lead once again, just when we thought that the competition had caught up. Something similar had happened with Intel last year when they announced their XMM 7360 LTE modem which was capable of the same 450 Mbps speeds as Qualcomm’s 9×40 series delivered at the time. However, Intel didn’t keep up with Qualcomm when they brought their speeds up to 600 Mbps on that series and Intel still hasn’t shipped their Cat. 10 modem and now looks to be significantly behind both Samsung Electronics and Qualcomm. It’s very possible we could see Intel’s Cat 10 LTE modems shipping in devices around the same time we start to see Qualcomm’s Cat 16, once again widening the gap between the two companies. Additionally, Qualcomm’s Snapdragon 820 will feature a Cat. 12 LTE integrated modem while Intel’s discrete modem is still only Cat. 10. Either way, 2016 is shaping up to be a pretty exciting year in the wireless space, especially with all of these new SoCs and modems coming to the market with the new 14nm FinFET process and amazing speeds.


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    Are Layoffs Good for the Semiconductor Industry?

    Are Layoffs Good for the Semiconductor Industry?
    by Daniel Nenni on 04-30-2016 at 7:00 am

    As I have mentioned before, semiconductor professionals are very smart people, pound for pound the smartest in the workforce in my opinion. So what happens when thousands of engineers from Qualcomm, Broadcom, Altera, and Intel get shown the door? They don’t go to work for Starbucks, they don’t go to the unemployment line, they continue to innovate, absolutely.

    Continue reading “Are Layoffs Good for the Semiconductor Industry?”