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Piper Jaffray Chip Analyst Spanks Intel!

Piper Jaffray Chip Analyst Spanks Intel!
by Daniel Nenni on 05-15-2012 at 7:30 pm
Categories: Foundries, Intel Foundry
17 Comments

This just in from Tech Trader Daily, quoting Piper Jaffraychip analyst Gus Richard:

The whole issue for Qualcomm, based on Richard’s conversations with industry types, is that the company has started making its “MSM8960″ chip with Taiwan Semiconductor Manufacturing (TSM) only two to three quarters after TSM introduced its new “28-nanometer” chip-making technology. That’s faster than the five to six quarters Qualcomm waited for the last process technology, at 45 nanometers.

This is absolutely true. Qualcomm has not had the “wafer allocation” variable in past product launching equations thus the bumbling this time. I still question when CEO’s blame supplier shortages for missed quarterly expectations. Either way you slice it they screwed up. Let’s see what excuses the fabless semiconductor CEO’s use when 28nm capacity is no longer an issue. My favorite three are:

[LIST=1]

  • Global Economic Slowdown
  • Inventory Corrections
  • My Dog Ate My Revenue

    Mr. Richard thinks Qualcomm is seeking second and third sources of supply:

    QCOM is using TSMC’s LP process based on a PolySiON gate stack. We believe Globalfoundries, Samsung and UMC have compatible processes. We are confident QCOM is working with GF and UMC and these sources will likely come up in Q4:12.

    Clearly Mr. Richard missed my blog on just that last month:

    UMC Wins Qualcomm 28nm Second Source Contract!

    Mr Richard believes Qualcomm has the best product in baseband chips to which I agree:

    While there are other LTE modems in the market, the power consumption of these products is unacceptably high. In addition, no other company offers the level of integration that QCOM provides in the MSM 8960 and its derivatives. In particular, QCOM’s main competitor, Intel, does not have an LTE modem. In addition, we believe Intel’s 22nm SoC process, 1271, will not be out until mid-2013.

    More importantly Mr Richard shares my view on Intel’s recent assault on the fabless semiconductor ecosystem:

    The use of fear uncertainty and doubt, FUD, in our view is a tactic used by companies when they are trying to obscure their own shortcomings. In our view, Intel’s narrative of exclusivity in process development and the end of the foundry model is disingenuous. So, the question is what is Intel trying to hide? We believe it is the following:

    [LIST=1]

  • PC growth rates are in a state of decline and what is replacing them are smartphones and tablets that use a much cheaper processor. Moreover, microservers pose the same threat to Intel in the server market, but likely far less impactful. This limits Intel’s ability to grow its top line.
  • Ultrabooks is simply a notebook pretending to be a tablet. In our view, Intel will not be competitive in the tablet market until the Haswell processor launches and Window’s 8 is stable in CY13, 3 years after the first iPad. The company has missed the market and scrambling to catch up. Tablets are what Intel hoped Netbooks would be. Moreover, tablets are basically big cell phones which do not play to Intel’s strengths.
  • Moore’s law is slowing due to increasing process complexity. This is reducing and ultimately eliminating benefits of scaling (Moore’s Law).

    Absulutely. The only point that I would add is cost. The mobile SoC market is VERY cost sensitive and that is a market that Intel knows little about. As you may have read, even though the process technology scales with smaller die sizes, faster clock speeds, and lower power leakage, the cost may be exponentially higher, especially for Intel.

    In summary, I really like this guy! Gus Richard has a graduate degree in Physics from Purdue and spent his first five of 25+ years working at a semiconductor mask shop in Silicon Valley before moving to the analyst side of the business. Lunch anytime Gus!

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    MIPS, ARM, ARC, Imagination, Ceva

    MIPS, ARM, ARC, Imagination, Ceva
    by Paul McLellan on 05-15-2012 at 4:59 pm
    Categories: Arm, Ceva, Imagination Technologies, IP
    3 Comments

    The Linley Group, whose conference on mobile I recently attended, has some interesting data about the processor core market. Firstly, the numbers are big: CPU cores shipped in over 10 billion chips last year which is up 25% on last. ARM has a share of 78% of that entire market. The big surprise to me was the #2 was not MIPS but Synopsys with the ARC processor that they acquired with Virage. They have a 10% share. MIPS can only manage 6%.

    ARM licensees shipped 7.9 billions chips on which ARM collected an average royalty of 4.6¢ down a little from 4.8¢ the year before. By contrast, MIPS licensees shipped just 650M chips although they made around 7¢ per chip.

    Given that kind of imbalance it is hard to see how MIPS can compete with ARM and there are plenty of rumors that MIPS is being shopped around. But that kind of instability make licensing really difficult. Nobody wants to invest in licensing a core when the company is short of resources to invest in R&D, and if the future of the whole company is uncertain the problem is compounded. Especially since a likely acquirer might be a competitor.

    However, having said all that, MIPS announced three new cores today under the brand name Aptiv. The three cores are the microAptiv, interAptiv and proAptiv in increasing order of performance, power and area. The high end proAptiv is firmly positioned as a competitor to ARM’s Cortex-A15. Whether these new cores are enough to convince anyone other than current licensees remains to be seen. One point I just re-discovered today that may or may not be significant is that the Chinese Loongson processor uses the MIPS instruction set. I’m not sure if this is a good thing for MIPS (wider use of software in the MIPS instruction set) or not (a competitor with the same instruction set).

    The DSP core market is dominated by Ceva with a market share of over 90%. Linley classify Tensilica and ARC as CPU blocks as opposed to DSPs but Ceva would still dominate the sector if they were classified as DSPs.

    The graphics GPU market is dominated by Imagination Technologies (just a short drive from ARM) with 82% market share (that’s what’s in your iPhone for example). ARM have their own GPU Mali but it has very limited acceptance so far. There is clearly some potential leverage for integrating the CPU and the GPU but so far ARM don’t seem to have found the magic formula. Qualcomm both licenses GPUs and has one of their own but since it is not externally licensed I assume that it is not included in these numbers. Samsung also has their own GPU Exynos which is the current performance leader.

    Linley expects CPU IP to maintain a CAGR of 10% for a least another 3 or 4 years until the market matures and smartphone growth starts to slow.

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    Cadence Update 2012!

    Cadence Update 2012!
    by Daniel Nenni on 05-14-2012 at 9:00 pm
    Categories: Cadence, EDA

    What’s new at Cadence? Quite a bit actually. I have always been a Cadence fan, I mean really, they gave birth to modern EDA. Unfortunately, Cadence really lost me during the Avant! legal action, the Mike Fister years, and EDA360. Recently, however, Cadence has made some big changes that will definitely get them back on my good side. The most recent change being the hiring of Martin Lund, SVP of the SoC Realization Business Unit.

    SoC Realization is a strategic growth area for Cadence,” said Lip-Bu Tan, president and CEO. “While at Broadcom, Martin Lund grew the company to become the global leader in Ethernet switch SoCs for data center, service provider, enterprise, and SMB markets, and successfully drove several strategic acquisitions. His extensive operational experience equips him well to scale our SoC Realization business.”

    As I have said before, IP is the center of the semiconductor universe and Martin Lund certainly knows IP from his 12 years at Broadcom and 20+ patents. Hopefully Martin accepts my LinkedIn invitation so we can talk in more detail.

    “Cadence is in an excellent position to deliver differentiated IP for memory, storage and connectivity,” said Martin Lund. “Customers are looking to Cadence to be their trusted partner in delivering these IP reliably and with high quality. This is an exciting time to join Cadence and I am looking forward to helping accelerate the company’s success.”

    Also new at Cadence is one of the mostaggressive DAC schedules I have seen from them in a long time. They have numerous luncheons, breakfasts, exhibits, tutorials, and workshops planned where they will take on the challenges of the evolving semiconductor ecosystem. And of course, you won’t want to miss the Denali party, especially if you are looking forward to hearing loss.

    Click the banner above and it will take you to the main Cadence DAC page. Here are some of the descriptions and associated links for Cadence content at DAC:

    Registration:http://www.cadence.com/dac2012/Pages/luncheons.aspx

    Monday, June 4, luncheon: 12:00 PM – 1:00 PM (doors open and lunch is served at 11:30 AM)
    Overcoming Variability and Productivity Challenges in Your High-Performance, Advanced Node, Custom/Analog Design

    Tuesday, June 5, breakfast: 8:00 AM – 10:00 AM (doors open and food is served at 7:30 AM)
    Addressing Hardware/Software Co-Development, System Integration, and Time to Market

    Tuesday, June 5, luncheon: 12:00 PM – 1:00 PM (doors open and lunch is served at 11:30 AM)
    Overcoming the Challenges of Embedding Ultra Low-Power, ARM 32-bit Processors into Analog/Mixed-Signal Designs

    Wednesday, June 6, breakfast: 8:00 AM – 9:00 AM(doors open and breakfast is served at 7:30 AM)
    The Path to Yielding at 2(x)nm and Beyond

    The Denali Party by Cadence
    Tuesday, June 5: 8:30 PM – 12:30 AM
    Ruby Skye nightclub

    Registration:http://www.cadence.com/dac2012/Pages/denali_party.aspx#regform

    Also, Cadence is involved in a number ofworkshops tutorials and panels. Please visit http://www.cadence.com/dac2012/Pages/speakers.aspx for details.

    I hope to see you there!

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    TSMC Tops Intel, Samsung in Capacity!

    TSMC Tops Intel, Samsung in Capacity!
    by Daniel Nenni on 05-13-2012 at 7:00 pm
    Categories: Foundries, Intel Foundry, TSMC
    8 Comments

    While I was marlin fishing in Hawaii last week I missed some interesting comments from TSMC executives at the Technology Symposium in Taiwan, a much different show than the one here in San Jose I’m told. It is good to see TSMC setting the record straight and taking a little credit for what they have accomplished! I’m sorry I missed it but I know quite a few people who didn’t and they were quite impressed.

    Y.P. Chin, TSMC Vice President for operations and product development (Y.P. joined TSMC when it was founded in 1987):

    Citing data from SEMI, TSMC’s capacity for logic chips was 1.5 times greater than Intel and 2 times greater than Samsung in 2011.

    Interesting perspective. If you look inside your smartphone or tablet you will see both logic (brains) and DRAM (memory) chips. TSMC does the brains, Samsung does mostly memory, Intel does the big fat brain in your PC and laptop (my wife edits my blogs so this is for her).

    Jason Chen, TSMC’s Senior Vice President of Worldwide Sales and Marketing (Prior to joining TSMC in 2005, Jason worked at Intel for 14+ years):

    Smartphones have beat PCs in shipments since 2010. In 2012, shipments of smartphones will beat PCs by 50%. Tablets join smartphones to make mobile computing an even bigger market. Smartphones have emerged as the primary tools for internet access with even more features fit inside in the future. Online payment for example will become a standard smartphone feature.

    I never thought I would give up my laptop but my iPhone 4s and iPad2 see much more action than I would have ever imagined. My wife and kids (ages 16, 18, 22, and 24) will tell you the same, absolutely. I even used my iPhone projected boarding pass to get to and from Hawaii avoiding check-in lines, very cool!

    That is why TSMC is leading off 20nm with a process optimized for mobile and Intel will need to optimize their 22nm process for mobile before mainstream customers take their foundry claims seriously.

    That is also why TSMC is increasing CAPEX and R&D spending to record rates this year, to capture as much mobile demand as possible. One thing you have to remember about the foundry business is that wafer price is everything, especially to the mobile market. Today TSMC is the only foundry shipping production 28nm silicon which means they have a big lead on the manufacturing yield/cost curve. Even when second source 28nm silicon hits the market it will be at a higher cost/lower margin. TSMC will also be the first with 20nm silicon (my opinion) so lather, rinse, repeat…

    A question I have is: How much longer will TSMC stock (TSM) continue to trade for under $16? Anyone? Given the success of 28nm, I think you will be able to measure that in months versus years (my opinion).

    Disclaimer: I do not partake in the financial markets so do not buy this or any other stock based on my comments. Seriously, you would be better off consulting your neighbor’s pet.

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    DAC: Finding Somewhere to Eat

    DAC: Finding Somewhere to Eat
    by Paul McLellan on 05-13-2012 at 3:00 pm
    Categories: EDA, Events

    I am not going to attempt to give you any restaurant advice beyond what I’ve already done by listing the good places near the conference center. San Francisco reputedly has over 3000 restaurants so I don’t know anything about more than a tiny fraction. However, with that many restaurants, most places are pretty good. If not, they close and the space gets taken over by someone else.

    Here is the San Francisco Chronicle’s food reviewer Michael Bauer’s list of the top 100 restaurants in the Bay Area. But you don’t need to go to an expensive restaurant to get a good meal in San Francisco. The city is made up of neighborhoods with lots of restaurants that are mostly frequented by locals, sprinkled with a few “destination restaurants” where people travel from all over to visit and usually with commensurately high prices. Two neighborhoods with especially high numbers of restaurants are the Mission (Valencia and Mission Streets between about 14[SUP]th[/SUP] Street and 24[SUP]th[/SUP] Street) and the Marina (Chestnut Street between about Laguna and Divisadero, and Union Street between the same cross streets ).

    The online reservation system OpenTable started in San Francisco (their offices are just a block away from Moscone) and most restaurants seem to be on it. They have a good iPhone and Android App too. So it is easy to find restaurants that still have reservations even at short notice.

    There are a huge number of gourmet food trucks in San Francisco. You can follow them on Twitter to know where they are. Or RoamingHunger follows them for you and puts them all on a map so you can see who is nearby. They have an iPhone App too (and presumably an Android one). I’ve only been to a couple of the trucks but the quality of the food is high and the prices low. Most only take cash.

    The best restaurant in San Francisco is almost always reckoned to be Gary Danko. But you need to make reservations a couple of months in advance, so you probably didn’t. However you can sit at the bar and have an incredible meal at a special low price (well, not low, but not stratospheric). Best thing to do is go there at 5.30pm when they open and grab a bar seat. Corner of Hyde and North Pointe.

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    Intel Foundry All Hat No Cattle?

    Intel Foundry All Hat No Cattle?
    by Daniel Nenni on 05-12-2012 at 12:19 am
    Categories: Arm, EDA, Events, Intel Foundry, IP, TSMC
    1 Comment

    If you look real close at the #49 DAC floor plan you will see the tiny Intel booth dwarfed by those of TSMC, GlobalFoundries, Samsung, and ARM. The number one semiconductor company in the world does not have the budget for the cornerstone conference of the semiconductor ecosystem? Oh my…… Intel has a big foundry hat and no cattle this year.

    Now in its 49th year (this will be my 29[SUP]th[/SUP]), the Design Automation Conference features a wide array of technical presentations, tutorials, and workshops, as well as more than 200 of the leading semiconductor ecosystem partners in a colorful, well-attended trade show that attracts thousands of semiconductor professionals from around the world.

    This year, industry luminaries from ARM, Inc., IBM Corp., Intel Corp. and the National Tsing Hua University will give the three keynote addresses. DAC 2012 will be held at my absolute favorite venue, other than Las Vegas, the Moscone Center in San Francisco, California, from June 3-7, 2012.


    “In assembling the 49th DAC series of distinguished keynotes speakers, I am excited to announce that DAC is covering all bases, providing refreshing viewpoints for systems designers, IC designers and EDA software professionals,” said Patrick Groeneveld, General Chair of the 49th DAC.

    “Tuesday kicks off with ARM’s Mike Muller, who will share his vision for a future of embedded computing systems. Given that ARM’s processors power most smartphones, this will show the way for computing in the future.”

    “On Wednesday, Joshua Friedrich and Brad Heaney will outline the design practices for high-performance microprocessors. This unique dual-keynote provides a look in the kitchen of leading microprocessor companies designing the world’s most advanced chips,” Patrick enthusiastically continued.

    “Finally, the Thursday keynote by Kaufman Award winner Dave Liu addresses the algorithmic revolution behind EDA. Prof. Liu’s contributions and insights have enabled the remarkable design automation revolution that actually powers today’s trillion-transistor devices.”

    Keynote Schedule:
    All keynotes will be held in rooms 102/103.

    Tuesday, June 5, 2012 from 8:30am to 9:30am
    Scaling for 2020 solutions
    Mike Muller, CTO, ARM Inc., Cambridge, U.K.

    Comparing the original ARM design of 1985 to those of today’s latest microprocessors, Mike will look at how far design has come and what EDA has contributed to enabling these advances in systems, hardware, operating systems, and applications as well as how business models have evolved over 25 years. He will then speculate on the needs for scaling designs into solutions for 2020 from tiny embedded sensors through to cloud-based servers that together enable the “Internet of things.” Mike will look at the major challenges that need to be addressed to design and manufacture these systems and propose some solutions.

    Wednesday, June 6, 2012 from 10:45am to 11:45am
    Designing High Performance Systems-on-Chip
    Joshua Friedrich, Senior Technical Staff Member and Senior Manager of POWERTM Technology Development in IBM’s Server and Technology Group. Brad Heaney, Intel Architecture Group Project Manager, Intel Corp., Folsom, CA.

    Experience state-of-the art design through the eyes of these two experts. Joshua Friedrich will talk about POWER processor design and methodology directions and Brad Heaney will discuss designing the latest Intel architecture multi-CPU and GPU. In this unique dual-keynote, the speakers will cover key challenges, engineering decisions and design methodologies to achieve top performance and turn-around time. The presentations describe where EDA meets practice under the most advanced nodes.

    Thursday, June 7, 2012 from 11:00am to 12:00pm
    My First Design Automation Conference – 1982
    C. L. (Dave) Liu of Tsing Hua University and also the recipient of the 2012 Phil Kaufman award.

    Dave tells us: “It was June 1982 that I had my first technical paper in the EDA area presented at the 19th Design Automation Conference. It was exactly 20 years after I completed my doctoral study and exactly 30 years ago from today. I would like to share with the audience how my prior educational experience prepared me to enter the EDA field and how my EDA experience prepared me for the other aspects of my professional life.”

    I hope to see you all there!

    Posted on

    Hardware Configuration Management at DAC 2012

    Hardware Configuration Management at DAC 2012
    by Daniel Payne on 05-11-2012 at 4:54 pm
    Categories: Cliosoft, EDA

    Next month at DAC I plan to visit the ClioSoft booth to get an update on what’s new with hardware configuration management (HCM). Last year I met with Srinath Anantharaman to get an introduction to their company and how their tools are used by both front-end engineers and back-end IC layout designers.

    Srinath Anantharaman, ClioSoft CEO

    A new product last year called Visual Design Diff proved useful to teams that needed to answer the question, “What Just Changed on my Transistor-Level Schematic?”

    This year you can use Visual Design Diff to look at the entire design hierarchy of your chip, quite a leap from just one cell at a time comparisons available last year. Hierarchy is used on every chip design, so I’m eager to see this capability in the tool at DAC.

    Many IC design teams use the Cadence Virtuoso schematic capture and layout tools, so ClioSoft has integrated into both the latest OA based tool using Virtuoso 6.x and the previous release of Virtuoso 5.x using CDBA.

    Don’t feel left out if you don’t use Cadence tools, because ClioSoft has integrated their HCM tool called SOS with the most popular IC tools like:

    • Cadence Virtuoso
    • Mentor ICstudio
    • Springsoft Laker
    • Synopsys Custom Designer

    The product demos that I’ve seen show that you access the HCM features by simply clicking a drop-down menu choice for Check-In or Check-Out. Users that I’ve interviewed tell me that their designers come up to speed on using the SOS tool on the same day that it is installed, while the CAD manager responsible for setting it up takes maybe a week to learn it.

    Other features to look for in a HCM tool are:

    • Version Control
      • Files and directories
    • Composite Objects
    • Concurrent checkout, branch and merge
    • Tagging
    • Snapshots
    • Work area release management
      • Copy work area
      • Linked work area
      • Isolated or shared
      • Revision search order
      • Rollback changes
      • Hierarchical reference and reuse
    • Architecture Choices
      • client-server architecture
      • Remote cache server
      • Smart cache technology
      • Push and pull updates
      • Repository
    • User Experience
      • GUI
      • Command line interface
      • Non intrusive
      • Production tested
    • Communication and collaboration
      • Collaboration icons
      • Triggers
      • Audit trail
      • Attributes and metrics
      • Integration with bug tracking

    Summary
    It’s time to add ClioSoft to your list of DAC companies, especially if your team does transistor-level design. There’s a page at the ClioSoft site where you can sign up for a meeting to get your questions answered and learn in more detail.

    Other HCM companies at DAC this year are Methodics and IC Manage. As a side note, on Google if you search for “ClioSoft configuration management” you see a paid ad for IC Manage:

    We’ve blogged before here at SemiWiki on how IC Manage competes with other companies on the web using competitor names.

    Also Read

    IC Layout Design at Qualcomm

    More Growth in EDA

    What Changed On My Transistor-Level Schematic?

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    ♫ If you are going to San Francisco, be sure to….

    ♫ If you are going to San Francisco, be sure to….
    by Paul McLellan on 05-10-2012 at 8:00 pm
    Categories: Uncategorized

    Well, you can wear flowers in your hair if you like, but it is a bit sixties. However, here are some things that I do recommend that you be sure to do.

    Some of these recommendations require you to find a given numbered pier. The Ferry Building at the end of Market Street is effectively pier 0. Odd numbers go north (including pier 1½ ). Even numbered piers go south (although many are missing). I used to live near pier 40 and would regularly meet people trying to find pier 39 which is a couple of miles away.

    See the Golden Gate Bridge. The best way is not to drive there or get a taxi, but to rent a bicycle (lots of places on that side of the city, try Googling “blazing saddles”) and cycle across the bridge. You can then go down the hill into Sausalito. There is a regular ferry back from Sausalito to San Francisco and you can take your bike on it. Or you can keep going to Tiburon and get the ferry back from there.

    Take a Tour of the Bay but ignore the official tours of the bay. Just take the ferry to Sausalito (from the Ferry Building or from pier 41), have a drink or a bite to eat, and get the ferry back. Cheapest bay tour available and voted the #2 most exciting ferry ride in the world by the Association of American Travel Writers (Kowloon to Hong Kong is #1 so rather a long way to go).

    Ride a Cable Car. But don’t wait in line for 40 minutes at Union Square or Fisherman’s Wharf. Instead, go to the cable car barn on the corner of Washington and Mason. This where the whole system is driven from and you can watch the engines hauling the miles of cable under the streets. Also a museum of everything cable car. And then when you have finished, you can just get on a cable car without needing to stand in line, and go back downtown. The best ride is not to sit but to stand on the outside and hang on.

    Don’t go to Fisherman’s WharfandPier 39. Everybody who lives here will tell you it’s not worth it. OK, so you are going to go anyway. Then at least go and see the Musée Méchanique on Pier 45. It is a huge selection of coin-operated antique arcade machines. It is free although you’ll presumably spend at least a few quarters in the machines.

    Go to Golden Gate Park. The most interesting things are the Conservatory of Flowers, the de Young Museum (closed on Mondays) and the Japanese Gardens and tea room. If you are a literary buff there is a garden containing every plant mentioned in Shakespeare. The California Academy of Sciences is also there but at $30 entry per adult it is very pricey. But if you are around on Thursday evening, it is open for only $12 with bars and music and without the place being overrun by school groups since it is adults only.

    See Chinatown. Here’s the best way to do it. Go to Union Square. Go shopping if that’s your thing. Then leave Union Square on Stockton Street and walk through the Stockton Street Tunnel. When you come out at the other end you are in the back of Chinatown and it is like you have landed in another country. Stockton Street is the non-touristy part of Chinatown, full of food shops and the like. Go down the hill one block to Grant Street if you feel the need to buy the sort of things tourists like to buy in Chinatown.

    Go to Alcatraz. Warning: you must book a few days in advance. You will not get tickets if you just show up. Really. Much the best is to take the night tour, which leaves around 6 and gets back around 9. There are fewer people on the island and you get to watch the sun set through the Golden Gate. The ferry leaves from pier 33. You can buy tickets online.

    The Exploratorium is the original hands-on science museum. Next year it moves to piers 13 and 15 but it is currently still at the Palace of Fine Arts, 3601 Lyon Street. Obviously it is a great place to take kids but anyone will find it interesting.

    Finally a few shops with some history:

    • City Lights Books founded in 1953 and closely associated with Allen Ginsburg and the other beat poets. A publisher as well as a bookstore, and now an official historic landmark. 261 Columbus at Broadway. Website.
    • 826 Valencia, the Pirate Store. It is actually a place for helping kids 6-18 with their writing skills, but they were in a space zoned for retail so they had to be a store too. They decided to be a pirate supply store. And they are. The story is told in this TED video. They have websites: Writing, Pirates.
    • Good Vibrations, female friendly sex-shop since 1977. One block from Moscone, 899 Mission Street at 5[SUP]th[/SUP] and 2 other places. And a website.
    • The Wok Shop. If you want a wok or any Asian-cooking-related tool, for over 35 years there has been nowhere else. 718 Grant Street between Sacramento and Clay. Website.
    • Rainbow Grocery. Food co-op since 1975. Totally San Francisco sustainable, local, organic. vegetarian. 1745 Folsom Street. Worth going just to see it, even if you are unlikely to be doing your food shopping there as you are a tourist. Don’t forget to take the bus. Website.
    • Ferry Building Farmers’ Market. On Saturday morning. The quality and range of the produce is extraordinary but you won’t save any money, even compared to Whole Foods. Go early if you want to have fun trying to spot celebrity chefs. In the parking lots around the Ferry Building where Market Street ends at the bay.