Intro
The 28nm nodes is ready with foundry silicon, IP and EDA tools. Tuesday morning at the DAC breakfast I learned more about the 28nm eco-system.
Notes
Why 32/28nm
–Lower power, high integration requirements, mobile applications
What is Ready?
–IP is qualified (ARM, Memories, Foundation IP, SNPS IP, PDKs)
–August 2010 SNPS and GLOBALFOUNDRIES at 28nm
–June 2011 SNPS and ARM at 28nm (A15 core)
–June 2010 Samsung at 32nm with SNPS tools
–Common Platform – Lynx tool flow is ready, January 2011
–June 2011 GLOBALFOUNDRIES ready at 28nm
–Samsung qualifies 28nm
–Samsung at 35 tape outs at 32nm to date
Anna Hunter, VP Samsung
Technology Roadmap
–32nm LP: ready, HKMG process
o SRAM at .149um*um, tiny size
o Good yield at 86%
o Matches SPICE results
–28nm LP: ready
o Same HKMG as 32nm node
o Works with ARM IP and SNPS tool flow
–28nm LPH: under development (low power, plus higher performance modules)
o Will be up to 50% faster (with more leakage, 2.3X)
o Same HKMG
o Added strain to silicon
o Shuttles starting now
–20nm LPM: in development, PDK evaluation now. Ready by end of 2012.
Lynx – flow of SNPS tools and IP management, used by Samsung internally too
ARM CPU – 45nm >1GHz on Cortex A9
–32/28nm >1.35GHz on Cortez A15
–28nm LPH, >2.0GHz Cortex A15
IP Portfolio – High Speed, Memory, Mixed Signal
–ARM, SNPS<
Going from 45nm to 32nm more than 50% improvement in SRAM bit cell size
Turn key solutions from Samsung
–Design, Fab, Wafer Sort, Assembly, Final Test
–Working on TSV technology for higher integration on packaging
MPW – Run every quarter for 32nm and 28nm
–Will start 20nm in September
Fab sites – Korea( 20nm), Texas (40K wafers per month)
Jim Ballingall, VP Marketing at GLOBALFOUNDRIES
–AMD lead product used HKMG technology, quad core CPU with GPU integrated, 500GFlops, for notebooks
–Llano powered laptops later in June
Super Low Power – 28nm SLP (doesn’t use stressing), about 2.3GHz
High Performance Plus – 28nm HPP (uses stressing), about 3.1GHz
Global Solutions – Design Solutions, Technology, Design Infrastructure<
IP – in place
Fabs – New York, Germany, Singapore
MPW – 4 shuttles in 2011
20nm – working with Common Platform partners, area scaling of 50% from 28nm
Next Generation of Systems Design at Siemens