A Brief History of NanGate

A Brief History of NanGate
by Daniel Nenni on 05-23-2013 at 8:10 pm

 NanGate got started in 2004 by a group of engineers from Vitesse Semi and Intel. The technology and market idea was to address and solve the inherent shortcomings of standard cell based design as compared to full custom. Anyone having tried to push the performance of a standard cell design knows the frustration… if only I had a better library or if I could just have these extra cells made!

Standard cell libraries have been around for a long time and have grown in size and complexity from a few hundred cells to several thousand cells. The library design and the choice of which cells to have in the library are key factors to getting the most performance out of the technology and at the lowest power and area possible. The problem is that making a standard cell library takes a lot of effort and has to be a compromise between the power, performance, and area demands from different applications.

NanGate is about creating and optimizing standard cell libraries. They focus on automating the whole process from library specification to GDSII and Liberty. They support and generate all the views and formats needed to use the libraries with standard synthesis and place-and-route flows. Automation and high productivity are key. As the only library optimization company in the world they can generate layout in geometries from 14nm to 350nm from Boolean equations, SPICE netlists or stick diagrams and automatically find the optimal implementation in the selected technology and cell template. Nangate even supports GDSII-to-GDSII migration and DFM optimization.

The Nangat tool suite includes library characterization and library validation. As in digital design formal verification, STA and DRC are must-haves for any contemporary design flow. Validating the library characterization is just as important as any mistakes or modeling inaccuracies will have wide ranging consequences. The same is the case for validating the many different views in the library such as LEF and verilog.

NanGate’s tool suite has been developed, improved and proven in combat during the last 8 years. It required more than $25 million in venture capital funding and an engineering team of more than 30 engineers at the top to pull it off. By 2009, NanGate had 5 EDA products in the market for Library Creation, Characterization and Validation:

  • NanGate Library Creator[SUP]TM[/SUP]
  • NanGate Library Characterizer[SUP]TM[/SUP]
  • NanGate Liberty Analyzer[SUP]TM[/SUP]
  • NanGate Design Audit[SUP]TM[/SUP]
  • NanSPICE[SUP]TM[/SUP]

The products have been adopted by more than 15 customers and several public testimonials have been made by leading foundries and semiconductor companies such as TSMC, Fujitsu and Renesas. NanGate’s library platform has enabled customers to create custom libraries with much less effort and to push the performance higher.

As with the EDA industry in general, the VCs left Nangate in 2012 which enabled a management buyout. Today, Nangate Inc is fully owned and controlled by management. They have refocused the company on the core customers and competencies of NanGate. And probably most importantly, they have restructured the company to be Silicon Valley-based and profitable. Moving forward, NanGate will focus on library automation and optimization for the most advanced process nodes. Partnerships are key to NanGate’s future strategy; recently they integrated Sagantec’s 2D compaction engine to add a DRC correct clean-up step at the end of the layout generation flow. This complements the existing layout creation solution and enables the most powerful 14nm solution in the market today.

NanGate, a provider of physical intellectual property(IP) and a leader in Electronic Design Automation (EDA) software, offers tools and services for creation and validation of physical library IP, and analysis and optimization of digital design. NanGate’s suite of solutions includes Library Creator™ Platform, Design Optimizer™ and design services. NanGate’s solution enables IC designers to improve performance and power by concurrently optimizing design and libraries. The solution, which complements existing design flows, delivers results that previously could only be achieved with resource intensive custom design techniques.

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