CadenceCONNECT: Tech Days Europe 2024 – Leuven

CadenceCONNECT: Tech Days Europe 2024 – Leuven
by Admin on 04-15-2024 at 4:03 pm

Date: Monday, June 10, 2024

Venue: imec Office

Location: imec 1, Kapeldreef 75, 3001 Leuven, Belgium

Parking: Head to the Parking Tower on the left hand side of the street, opposite imec I. Entrance to parking is at the end of the tower, where you will be greeted by a security guard to allow you access.

You will receive further information

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CadenceCONNECT: Tech Days Europe 2024 – Sophia Antipolis

CadenceCONNECT: Tech Days Europe 2024 – Sophia Antipolis
by Admin on 04-15-2024 at 3:56 pm

Date: Tuesday, June 4, 2024

Venue: Novotel Antibes Sophia Antipolis

Location: 290 rue Fedor Dostoievski, Les Lucioles 1, 06560 Valbonne, France

Parking: On-site parking available.

You will receive further information in your registration confirmation email.

Analog, RF, and Mixed-Signal IC Design

Learn how the latest developments

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CadenceCONNECT: Tech Days Europe 2024 – Milan

CadenceCONNECT: Tech Days Europe 2024 – Milan
by Admin on 04-15-2024 at 3:54 pm

Date: Tuesday, May 21, 2024

Venue: H2C Hotel Milanofiori

Location: Via Roggia Bartolomea, 5, 20057 Assago MI, Italy

Parking: There is a car park on-site that is free of charge. Spaces cannot be guaranteed as it is used by all hotel guests.

You will receive further information in your registration confirmation email.

Analog, RF,

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CadenceCONNECT: Tech Days Europe 2024 – Munich

CadenceCONNECT: Tech Days Europe 2024 – Munich
by Admin on 04-15-2024 at 3:50 pm

Date: Thursday, May 16, 2024

Venue: Holiday Inn Munich – City Centre

Location: Hochstrasse 3, Munich, 81669 Germany

Parking: On-site parking for €20 per day.

You will receive further information in your registration confirmation email.

Analog, RF, and Mixed-Signal IC Design

Learn how the latest developments within

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Making UVM faster through a new configuration system

Making UVM faster through a new configuration system
by Daniel Payne on 12-26-2023 at 10:00 am

Elapsed Time min

The Universal Verification Methodology (UVM) is a popular way to help verify SystemVerilog designs, and it includes a configuration system that unfortunately has some speed and usage issues. Rich Edelman from Siemens EDA wrote a detailed 20-page paper on the topic of how to avoid these issues, and I’ve gone through it to… Read More


A New Verification Conference Coming to Austin

A New Verification Conference Coming to Austin
by Bernard Murphy on 08-15-2023 at 6:00 am

Actually not so new, just new to us in the US. Verification Futures is already well established as a Tessolve event with a 10-year track record in the UK. This year they are bringing the conference to Austin on September 14th (REGISTER HERE).

While DVCon is an ever-popular event for sharing verification ideas, it isn’t always accessible… Read More


Optimizing Return on Investment (ROI) of Emulator Resources

Optimizing Return on Investment (ROI) of Emulator Resources
by Kalar Rajendiran on 04-12-2023 at 6:00 am

Verification Options SW vs HAV

Modern day chips are increasingly complex with stringent quality requirements, very demanding performance requirement and very low power consumption requirement. Verification of these chips is very time consuming and accounts for approximately 70% of the simulation workload on EDA server farms. As software-based simulators… Read More


Full-Stack, AI-driven EDA Suite for Chipmakers

Full-Stack, AI-driven EDA Suite for Chipmakers
by Kalar Rajendiran on 04-03-2023 at 6:00 am

Synopsys.ai Industry First AI driven Full EDA Suite

Semiconductor technology is among the most complex of technologies and the semiconductor industry is among the most demanding of industries. Yet the ecosystem has delivered incredible advances over the last six decades from which the world has benefitted tremendously. Yes, of course, the markets want that break-neck speed… Read More


Truechip Introduces Automation Products – NoC Verification and NoC Performance

Truechip Introduces Automation Products – NoC Verification and NoC Performance
by Kalar Rajendiran on 11-07-2022 at 10:00 am

Truechip NoC Automation Product

While Truechip has established itself as a global provider of verification IP (VIP) solutions, they are always on the lookout for strategic IP needs from their customer base. Over the last several years, a solid market for Network-on-Chip (NoC) IP has grown, driven by the need to rapidly move data across a chip. Concurrently, the… Read More


New Cadence Joint Enterprise Data and AI Platform Dramatically Accelerates AI-Driven Chip Design Development

New Cadence Joint Enterprise Data and AI Platform Dramatically Accelerates AI-Driven Chip Design Development
by Kalar Rajendiran on 10-24-2022 at 10:00 am

1 Cadence Joint Enterprise Data and AI JedAI Platform

Without data, there is no computing field to talk about, no technology world to awe at and not much of a semiconductor industry to work in. There is no argument that data is the foundational piece for everything, has been to date and will continue to be. While processing an application’s input data is essential to serve the intended… Read More