There was an interesting panel at the Silicon Summit sponsored by the Global Semiconductor Alliance (GSA) on “Designing for the Cloud.” It was led by Linley Gwennap (The Linley Group) with Ivo Bolsons (Xilinx), Ian Ferguson (ARM), and Steve Pawloski (Micron). Missing of course was Intel which derives close to 30% of its revenue… Read More
Tag: tsmc
Electrostatic Discharge analysis of FinFET technology
Sofics recently had the opportunity to characterize FinFET technology through cooperation with one of its customers. We analyzed the technology related to ESD and identified several challenges.… Read More
TSMC Update at #53DAC!
TSMC is having an interesting year for sure. I was at the TSMC Symposium in Hsinchu last week and everyone was talking about the new 16FFC process. Silicon is out and it is exceeding expectations leading some people (me included) to believe that TSMC 16FFC will be the next TSMC 28nm in regards to popularity. To be clear, 16FFC is currently… Read More
How TSMC Tackles Variation at Advanced Nodes
The design community is always hungry for high-performance, low-power, and low-cost devices. There is emergence of FinFET and FDSOI technologies at ultra-low process nodes to provide high-performance and low-power requirements at lower die-size. However, these advanced process nodes are prone to new sources of variation.… Read More
ARM tests out TSMC 10FinFET – with two cores
About 13 months ago, the leak blogs posted news of “Artemis” on an alleged ARM roadmap slide, supposedly a new 16FF ARM core positioned as the presumptive successor to the Cortex-A57. Now, we’re finding out what “Artemis” may actually be, inside a multi-core PPA test chip on TSMC 10FinFET.… Read More
TSMC Leads Again with 3-D Packaging!
Continuing to find new ways to extend Moore’s Law, the foundry and technology leader is ready to show off its wafer level system integration prowess with two scalable platforms targeting key growth markets.
CoWoS® (Chip-On-Wafer-On-Substrate) goes after high-performance applications, providing the highest bandwidth and… Read More
Stop FinFET Design Variation @ #53DAC and get a free book!
If you plan on visiting Solido (the world leader in EDA software for variation-aware design of integrated circuits) at the Design Automation Conference next month for a demonstration of Variation Designer, register online now and get an autographed copy of “Mobile Unleashed”. Such a deal!
Solido Variation Designer is used by… Read More
TSMC and Solido on Variation-Aware Design of Memory and Standard Cell at Advanced Process Nodes
Being that TSMC and Solido are founding members of SemiWiki, you should be able find out everything you ever wanted to know on their respective landing pages. If not, just ask a question in the SemiWiki forum and I can assure you it will be answered in great detail. And here are some other interesting 2015 factoids from Solido:… Read More
Semiconductor capital spending slow in 2016
The outlook for semiconductor capital expenditures (capex) in 2016 is weak. Gartner’s January 2016 forecast called for a decline of 4.7%. IC Insights in February projected a 0.8% decline. The table below shows the Gartner forecast along with the capex forecasts from the top three spenders (Intel, Samsung and TSMC) which… Read More
EUV is coming but will we need it?
I have written multiple articles about this year’s SPIE Advanced Lithography Conference describing all of the progress EUV has made in the last year. Source power is improving, photoresists are getting faster, prototype pellicles are in testing, multiple sites around the world are exposing wafers by the thousands and more. … Read More