At the 2021 Symposium on VLSI Technology and Circuits in June a short course was held on “Advanced Process and Devices Technology Toward 2nm-CMOS and Emerging Memory”. In this article I will review the first two presentations covering leading edge logic devices. The two presentations are complementary and provide and excellent… Read More
Tag: tsmc
Circuit Simulation Challenges to Design the Xilinx Versal ACAP
One of the most unique acronyms that I learned about this past year is ACAP from Xilinx, which stands for Adaptive Compute Acceleration Platform. At the recent Cadence LIVE event, I had the pleasure of watching Pei Yao, a Xilinx senior staff CAD engineer, as she talked about the challenges of getting all the analog and mixed-signals… Read More
Semiconductor CapEx strong in 2021
Semiconductor manufacturers are expanding capital spending in 2021 and beyond to help alleviate shortages. In addition, many governments around the world are proposing funding to support semiconductor manufacturing in their countries.
The United States Senate this month approved a bill which includes $52 billion to fund… Read More
Highlights of the TSMC Technology Symposium 2021 – Automotive
At the recent TSMC Technology Symposium, TSMC provided a detailed discussion of their development roadmaps. Previous articles have reviewed the highlights of silicon process and packaging technologies. The automotive platform received considerable emphasis at the Symposium – this article specifically focuses on the… Read More
Highlights of the TSMC Technology Symposium 2021 – Packaging
The recent TSMC Technology Symposium provided several announcements relative to their advanced packaging offerings.
General
3DFabricTM
Last year, TSMC merged their 2.5D and 3D package offerings into a single, encompassing brand – 3DFabric.
2.5D package technology – CoWoS
The 2.5D packaging options are divided into the CoWoS… Read More
TSMC and the FinFET Era!
While there is a lot of excitement around the semiconductor shortage narrative and the fabs all being full, both 200mm and 300mm, there is one big plot hole and that is the FinFET era.
Intel ushered in the FinFET era only to lose FinFET dominance to the foundries shortly thereafter. In 2009 Intel brought out a 22nm FinFET wafer at the… Read More
Chips for America Act – Funding Failures & Foreigners or Saving Semiconductors?
-A repeat of the auto industry bailout of self inflicted issues?
-Not just money but systemic change is needed
-Perhaps chips need an Elon led revolution like autos & space
-Govt $ need focus not thrown into existing spend avalanche.
Are chips a replay of the auto industry bailout a decade ago? Deja Vu all over again.
The… Read More
TSMC 2021 Technical Symposium Actions Speak Louder Than Words
The TSMC Symposium kicked of today. I will share my general thoughts while Tom Dillinger will do deep dives on the technology side. The event started with a keynote by TSMC CEO CC Wei followed by technology presentations by the TSMC executive staff.
C.C. Wei introduced a new sound bite this year that really resonated with me and that… Read More
3rd Party Semiconductor Intellectual Property Market Update
The 3rd Party Semiconductor Intellectual Property (IP) market has seen great innovation in the products it offers to System-on-a-Chip (SoC) designers over the last ten years. If any market segment in the semiconductor industry typifies the intense evolutionary pressures that the entire electronics market has undergone, … Read More
Is IBM’s 2nm Announcement Actually a 2nm Node?
IBM has announced the development of a 2nm process.
IBM Announcement
What was announced:
- “2nm”
- 50 billion transistors in a “thumbnail” sized area later disclosed to be 150mm2 = 333 million transistors per millimeter (MTx/mm2).
- 44nm Contacted Poly Pitch (CPP) with 12nm gate length.
- Gate All Around (GAA), there are several ways
