Comparing Advanced Packaging from TSMC, Intel Foundry, and Samsung Foundry

Comparing Advanced Packaging from TSMC, Intel Foundry, and Samsung Foundry
by Daniel Nenni on 09-06-2026 at 10:00 am

Advanced Chip Packaging Comparison INtel TSMC Samsung

Advanced semiconductor packaging has become essential to improving computing performance as conventional transistor scaling grows more difficult and expensive. Instead of manufacturing an entire processor as one large monolithic die, chipmakers can divide it into smaller chiplets and combine logic, memory, input/output… Read More


HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory

HBM’s Vertical Ascent: Why Packaging Is Becoming the Heart of AI Memory
by Admin on 09-03-2026 at 6:00 am

HBM’s Vertical Ascent

SK hynix’s Hot Chips 2026 presentation explains how High Bandwidth Memory (HBM) is evolving to meet the extraordinary memory requirements of artificial intelligence. Its central message is that future progress will depend not only on better DRAM circuits but also on advanced packaging, denser vertical integration, improved… Read More


TSMC’s Overseas Fabs Are Paying Off

TSMC’s Overseas Fabs Are Paying Off
by Daniel Nenni on 08-28-2026 at 6:00 am

TSMC's Overseas Fabs Are Paying Off

TSMC’s overseas fabrication strategy is beginning to deliver its intended return: not immediate cost parity with Taiwan, but manufacturable geographic redundancy, closer integration with major customers and access to subsidized capacity in strategically important markets. Arizona and Kumamoto are already producing … Read More


Huawei Can’t Shrink Its Chips, So It’s Folding Them

Huawei Can’t Shrink Its Chips, So It’s Folding Them
by Daniel Nenni on 08-27-2026 at 8:00 am

Huawei Can’t Shrink Its Chips, So It’s Folding Them

On May 25, Huawei semiconductor chief He Tingbo unveiled LogicFolding, an architecture intended to advance chip performance without relying on ever-smaller transistors. Presented alongside Huawei’s “Tau Scaling Law,” the approach prioritizes signal speed over transistor dimensions. It is a genuine engineering response… Read More


Europe OIP Ecosystem Workshop

Europe OIP Ecosystem Workshop
by Admin on 08-24-2026 at 12:15 am

Join Us to Connect, Collaborate, and Shape the Future of AI

Get ready to immerse yourself in the future of semiconductor design at the 2026 TSMC Global Open Innovation Platform® (OIP) Ecosystem Forum! This isn’t just an event—it’s the ultimate collaborative hub where the world’s leading technology pioneers gather to discuss… Read More


Japan OIP Ecosystem Workshop

Japan OIP Ecosystem Workshop
by Admin on 08-24-2026 at 12:06 am

Join Us to Connect, Collaborate, and Shape the Future of AI

Get ready to immerse yourself in the future of semiconductor design at the 2026 TSMC Global Open Innovation Platform® (OIP) Ecosystem Forum! This isn’t just an event—it’s the ultimate collaborative hub where the world’s leading technology pioneers gather to discuss… Read More


TSMC 2026 North America OIP Ecosystem Forum

TSMC 2026 North America OIP Ecosystem Forum
by Admin on 08-24-2026 at 12:04 am

Join Us to Connect, Collaborate, and Shape the Future of AI

Get ready to immerse yourself in the future of semiconductor design at the 2026 TSMC Global Open Innovation Platform® (OIP) Ecosystem Forum! This isn’t just an event—it’s the ultimate collaborative hub where the world’s leading technology pioneers gather to discuss… Read More


How TSMC Is Wiring the AI Era With Light

How TSMC Is Wiring the AI Era With Light
by Daniel Nenni on 08-21-2026 at 10:00 am

How TSMC Is Wiring the AI Era With Light

TSMC’s photonics strategy is centered on integrating optical input-output with advanced logic, rather than selling conventional optical transceivers as standalone products. The company is developing a silicon-photonics foundry platform and a packaging architecture called TSMC-COUPE, or Compact Universal Photonic … Read More