Arteris Adds Functional Safety to NoC

Arteris Adds Functional Safety to NoC
by Majeed Ahmad on 02-17-2015 at 1:00 pm

Arteris Inc.has joined hands with Yogitech S.p.A. to help automotive system-on-chip (SoC) designers meet the required functional safety metrics and obtain the ISO 26262 certification for automotive safety integrity levels (ASIL) in the least possible time.

Arteris—which provides network-on-chip (NoC) interconnect IPRead More


A Comprehensive Automated Assertion Based Verification

A Comprehensive Automated Assertion Based Verification
by Pawan Fangaria on 02-13-2015 at 4:00 pm

Using an assertion is a sure shot method to detect an error at its source, which may be buried deep within a design. It does not depend on a test bench or checker, and can fire automatically as soon as a violation occurs. However, writing assertions manually is very difficult and time consuming. To do so require deep design and coding… Read More


Integrated Spec Design & Documentation for SoC

Integrated Spec Design & Documentation for SoC
by Daniel Payne on 02-08-2015 at 1:00 pm

One challenge in SoC projects is maintaining consistency between the specification, design and documentation throughout the product lifecycle. Imagine the chaos if your specification for power is 300 mW, the design is actually 350 mW and the documentation promises 250 mW. Traditionally the design and documentation process… Read More


IP Market at Your Desk!

IP Market at Your Desk!
by Pawan Fangaria on 02-01-2015 at 4:00 pm

Semiconductors have played very important role in making internet successful and that has unleashed the potential of e-commerce. Today, we see names like Alibaba, whose primary focus is on commodity trade. I couldn’t imagine an e-commerce type of web portal for semiconductor services until I looked at the eSilicon website. … Read More


NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers

NoC 102: Using SonicsGN to Address Low Power Requirements From IoT to Servers
by Paul McLellan on 01-29-2015 at 7:00 am

At the end of last year, I moderated a Sonics webinar to introduce the concept of a network-on-chip or NoC. It was called NoC 101 and the replay is still available here.

Well it is a new year and time for chapter 2. I will be moderating a webinar next Wednesday February 4th at 10am pacific time. Once again the webinar itself will be delivered… Read More


Qualcomm versus Samsung?

Qualcomm versus Samsung?
by Daniel Nenni on 01-28-2015 at 3:00 am

There is an interesting reality show playing in the media featuring Qualcomm and Samsung with supporting actors TSMC, LG, Xaomi, and Apple. As I’m sure we all have read, Samsung is losing massive amounts of money on mobile which was once a very profitable business unit. Let’s take a look at the current landscape and some of the recent… Read More


An Approach to Top-Down SoC Verification

An Approach to Top-Down SoC Verification
by Daniel Payne on 12-19-2014 at 1:00 pm

We’ve blogged dozens of times about UVM– Universal Verification Methodology at SemiWiki, and all of the major EDA vendors support UVM, so you may be lulled into thinking that UVM is totally adequate for top-down SoC verification. Yesterday I had a phone discussion with Frank Schirrmeister of Cadence about a new approach… Read More


ASIC Days Are Here Again

ASIC Days Are Here Again
by Paul McLellan on 12-18-2014 at 7:00 am

Technology often goes in cycles. Thirty years ago the dominant mode of computing was a shared computing resource with comparatively dumb terminals. Think of a Vax accessed by terminals. Then workstations and the PC came along and the dominant mode became a computer on everyone’s desk. Then the smartphone came along and … Read More


Expert Tool to Easily Debug RTL and Reuse in SoCs

Expert Tool to Easily Debug RTL and Reuse in SoCs
by Pawan Fangaria on 12-16-2014 at 7:00 pm

SoC design these days has become a complex and tricky phenomenon involving integration of multiple IPs and legacy RTL code which could be in different languages, sourced from various third parties across the globe. Understanding and reusing RTL code is imperative in SoC integration which needs capable tools that can accommodate… Read More


NoC IP boosts SoC reliability, fault tolerance

NoC IP boosts SoC reliability, fault tolerance
by Majeed Ahmad on 12-14-2014 at 7:00 pm

System-on-chip (SoC) devices are increasingly becoming more complex in terms of adding functionality yet they need to be more reliable and fault tolerant for automotive, aerospace and industrial electronics.

Arteris Inc.—which invented the network-on-chip (NoC) interconnect technology back in 2006—is now offering FlexNoC… Read More