Design and Verification IP: Insights From a SmartDV Insider

Design and Verification IP: Insights From a SmartDV Insider
by Kalar Rajendiran on 09-09-2021 at 10:00 am

SmartDV Range of IP Offerings

Just as SmartTV has become a household term, SmartDV has become a well-known name within semiconductor design and verification circles. SmartDV™ Technologies is the proven and trusted choice for Smart Design IP and a range of Verification Solutions™ from Verification IP, including assertion-based and post-silicon validation… Read More


Cadence Tensilica FloatingPoint DSPs

Cadence Tensilica FloatingPoint DSPs
by Kalar Rajendiran on 07-15-2021 at 10:00 am

Tensilica FP DSPs

Being engrossed in the digital information world, it is easy to forget that the real world is comprised of mostly analog signals and data. Digital Signal Processors (DSP) take digitized forms of these worldly signals and manipulate them mathematically. Although floating-point is a more relevant and accurate way of representing… Read More


Accelerate Full-Chip Signoff with Massively Parallel Scalability

Accelerate Full-Chip Signoff with Massively Parallel Scalability
by Admin on 06-01-2021 at 12:00 am

Overview

Physical design constraints become a lot more complicated in the advanced nodes, leading to the exponential growth of design rules while adding complexity. Decreasing the active device sizes and higher geometry densities results in increased design rule check (DRC) run time, a big metal fill impact on chip functionality,

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How to Grow with Poise and Grace, a Tale of Scalability from ClioSoft

How to Grow with Poise and Grace, a Tale of Scalability from ClioSoft
by Mike Gianfagna on 06-23-2020 at 10:00 am

Screen Shot 2020 05 10 at 1.06.27 PM

ClioSoft published a white paper recently entitled Best Practices are the Foundations of a Startup. The piece discusses the needs and challenges associated with building a scalable infrastructure to support growth.

Before I get into more details on ClioSoft’s white paper, I would offer my own experience on this topic – the need… Read More


Mentor Plays for Keeps in Emulation

Mentor Plays for Keeps in Emulation
by Bernard Murphy on 02-17-2017 at 7:00 am

EDA has always been a fiercely competitive market, no more so than in emulation where the clash of claims and counter-claims can leave those of us on the sidelines wondering who’s really on top. Sales are the obvious indicator but leadership there flips back and forth between product releases. That makes Mentor’s choice to play … Read More


What Does Legal Sea Foods Have to Do With EDA?

What Does Legal Sea Foods Have to Do With EDA?
by Paul McLellan on 08-11-2015 at 7:00 am

When I drive down to Silicon Valley I usually listen to podcasts rather than just listen to the radio. One that I especially like is Russ Robert’s EconTalk, which has an hour-long episode every Monday morning on a wide range of different aspects of Economics. Normally he interviews an economist. He has also interviewed the… Read More


Taking prototyping beyond prototypes

Taking prototyping beyond prototypes
by Don Dingee on 07-22-2015 at 12:00 pm

Everyone has heard the expression, “Half the job is having the right tool.” In the case of FPGA-based prototyping, however, the right tool for the job is only the beginning. What teams really need to think through is what exactly should be done with an FPGA-based prototyping tool?

The obvious answer is prototyping an SoC, pre-silicon.… Read More


Why Would You Leave Yahoo to Go Into EDA?

Why Would You Leave Yahoo to Go Into EDA?
by Paul McLellan on 02-06-2015 at 7:00 am

I sat down this afternoon with Peter Theunis, the CTO of Methodics. Conveniently their office is about a 15 minute walk from where I live so we could chat face to face.

Peter started programming when he was 8 and his first “product” was a weather system for orchards where sensors in the orchards would send information … Read More


Opting for ARM software scalability

Opting for ARM software scalability
by Don Dingee on 08-26-2014 at 12:00 pm

Behind much of the success of ARM architecture is a scalable software model, where in theory the same code runs on the smallest member of the family to the largest. In practice, there are profiles, and a variety of hardware execution units, and resource constraints in low power scenarios that enter the picture. As a result, operating… Read More