ANSYS, TSMC Document Thermal Reliability Guidelines

ANSYS, TSMC Document Thermal Reliability Guidelines
by Bernard Murphy on 01-01-2020 at 6:00 am

Automotive Reliability Guide min

Advanced IC technologies, 5nm and 7nm FinFET design and stacked packaging, are enabling massive levels of integration of super-fast circuits. These in turn enable much of the exciting new technology we hear so much about: mobile gaming and ultra-high definition mobile video through enhanced mobile broadband in 5G, which requires… Read More


Achieving a Predictable SignOff in 7nm

Achieving a Predictable SignOff in 7nm
by Alex Tan on 05-14-2019 at 12:00 pm

Designing with advanced-nodes FinFETs such as 7nm node involves a more complex process than prior nodes. As secondary physical effects are no longer negligible, the traditional margin-based approach applied at various design abstraction levels is considered ineffective. Coupled with the increase of device counts, failing… Read More


Webinar: NVIDIA Talks High Quality Metrics in Power Integrity Signoff

Webinar: NVIDIA Talks High Quality Metrics in Power Integrity Signoff
by Bernard Murphy on 11-09-2018 at 12:00 pm

There’s a familiar saying that you can’t improve what you can’t measure. Taking that one step further, the more improvement you want, the more accurately you have to measure. This become pretty important when you’re building huge designs in advanced technologies. Margins are a lot tighter all round and use-cases are massively… Read More


Integrity, Reliability Shift Left with ICC

Integrity, Reliability Shift Left with ICC
by Bernard Murphy on 06-26-2018 at 7:00 am

There is a nice serendipity in discovering that two companies I cover are working together. Good for them naturally but makes my job easier because I already have a good idea about the benefits of the partnership. Synopsys and ANSYS announced a collaboration at DAC 2017 for accelerating design optimization for HPS, mobile and automotive.… Read More


ANSYS at DAC

ANSYS at DAC
by Bernard Murphy on 06-21-2018 at 7:00 am

I’m not going to be at DAC this year because I scheduled a fishing trip at the end of June, assuming the show would stay true to form as an early/mid-June event. Still, having to endure salmon and halibut fishing in Alaska rather than slogging around Moscone Center, I can’t pretend to be too disappointed; I’ll be thinking of you all 😎.… Read More


Thermal and Reliability in Automotive

Thermal and Reliability in Automotive
by Bernard Murphy on 06-12-2018 at 7:00 am

Thermal considerations have always been a concern in electronic systems but to a large extent these could be relatively well partitioned from other concerns. Within a die you analyze for mean and peak temperatures and mitigate with package heat-sinks, options to de-rate the clock, or a variety of other methods. At the system level… Read More


Retooling Implementation for Hot Applications

Retooling Implementation for Hot Applications
by Bernard Murphy on 05-17-2018 at 7:00 am

It might seem I am straying from my normal beat in talking about implementation; after all, I normally write on systems, applications and front-end design. But while I’m not an expert in implementation, I was curious to understand how the trending applications of today (automotive, AI, 5G, IoT, etc.) create new demands on implementation,… Read More


Reliability Signoff for FinFET Designs

Reliability Signoff for FinFET Designs
by Bernard Murphy on 10-17-2017 at 7:00 am

Ansys recently hosted a webinar on reliability signoff for FinFET-based designs, spanning thermal, EM, ESD, EMC and aging effects. I doubt you’re going to easily find a more comprehensive coverage of reliability impact and analysis solutions. If you care about reliability in FinFET designs, you might want to check out this webinar.… Read More


Power Integrity from 3DIC to Board

Power Integrity from 3DIC to Board
by Bernard Murphy on 09-14-2017 at 7:00 am

The semiconductor industry has built decades of success on hyper-integration to increase functionality and performance while also reducing system cost. But the standard way to do this, to jam more and more functionality onto a single die, breaks down when some of the functions you want to integrate are built in different processes.… Read More


Margin Call

Margin Call
by Bernard Murphy on 06-04-2017 at 7:00 am

A year ago, I wrote about Ansys’ intro of Big Data methods into the world of power integrity analysis. The motivation behind this advance was introduced in another blog, questioning how far margin-based approaches to complex multi-dimensional analyses could go. An accurate analysis of power integrity in a complex chip should… Read More