Tag: process

Achieving Innovation with Smart Product and Process Design

Achieving Innovation with Smart Product and Process Design
by Admin on 12-09-2021 at 2:51 pm

Consumer products companies are facing many challenges including globalization, increased regulatory demands and sustainability concerns, personalization… More than ever before, consumers demand to be part of the innovation process to influence how new products should look like.

To deliver the innovation, speed, quality,

… Read More

Process Integration and Design Optimization for Computational Fluid Dynamics Problems Using Ansys optiSLang

Process Integration and Design Optimization for Computational Fluid Dynamics Problems Using Ansys optiSLang
by Admin on 05-10-2021 at 1:40 pm

Learn how to apply process integration and design optimization principles to computational fluid dynamics problems.

Time:
June 17, 2021
10 AM EDT / 3 PM BST / 7:30 PM IST

Venue:
Online

In this webinar we will show how the power of interactive visualization and artificial intelligence (AI) technologies enables engineers and designers… Read More

Posted on

5 Things You Need to Plan for System Custom Silicon

5 Things You Need to Plan for System Custom Silicon
by Raul Perez on 12-13-2020 at 10:00 am
Categories: Custom Silicon, Semiconductor Services

logo4semiwiki

I used to be part of the custom silicon management team at Apple.  I’ve seen how great a challenge it is to pull off a custom silicon strategy within a one year product cycle. Apple is the perfect example of this custom silicon model since they develop the best mobile processors in the world for their products. Which also includes other… Read More

Posted on

ISO 26262: My IP Supplier Checks the Boxes, So That’s Covered, Right?

ISO 26262: My IP Supplier Checks the Boxes, So That’s Covered, Right?
by Bernard Murphy on 05-24-2018 at 7:00 am
Categories: Arteris, Automotive, IP
1 Comment

Everyone up and down the electronics supply chain is jumping on the ISO 26262 bandwagon and naturally they all want to show that whatever they sell is compliant or ready for compliance. We probably all know the basics here – a product certification from one of the assessment organizations, a designated safety manager and a few other… Read More

Posted on

Webinar Alert – Embedded Monitoring of Process and Voltage in SoCs

Webinar Alert – Embedded Monitoring of Process and Voltage in SoCs
by Daniel Payne on 03-13-2018 at 12:00 pm
Categories: EDA, Events, Moortec

In the old days to learn about new semiconductor IP you would have to schedule a sales call, listen to the pitch, then decide if the IP was promising or not. Today we have webinars which offer a lot less drama than a sales call, plus you get to ask your questions by typing away at the comfort of your desk, hopefully wearing headphones as … Read More

Posted on

Using Sequential Testing to Shorten Monte Carlo Simulations

Using Sequential Testing to Shorten Monte Carlo Simulations
by Tom Simon on 12-27-2017 at 7:00 am
Categories: EDA, MunEDA
1 Comment

When working on an analog design, after initial design specs have been met, it is useful to determine if the design meets specs out to 3 or 4 sigma based on process variation. This can serve as a useful step before going any further. It might not be a coincidence that foundries base their Cpk on 3-sigma. To refresh, Cpk is the ratio of the… Read More

Posted on

Mentor Webinar Series: Integrating the Systems Engineering Flow

Mentor Webinar Series: Integrating the Systems Engineering Flow
by Bernard Murphy on 10-28-2016 at 7:00 am
Categories: EDA, Siemens EDA

Product lifecycle management is probably not the most gripping topic for most design engineers. You want to get on with architecture, design, verification and implementation. But if you are building products for any safety-sensitive application in a car, a medical appliance, avionics, railway applications in Europe – to name… Read More

Posted on

How TSMC Tackles Variation at Advanced Nodes

How TSMC Tackles Variation at Advanced Nodes
by Pawan Fangaria on 05-27-2016 at 12:00 pm
Categories: EDA, FinFET, Foundries, Solido, TSMC

The design community is always hungry for high-performance, low-power, and low-cost devices. There is emergence of FinFET and FDSOI technologies at ultra-low process nodes to provide high-performance and low-power requirements at lower die-size. However, these advanced process nodes are prone to new sources of variation.… Read More

Posted on

Webinar: A Tool for Process and Device Evaluation

Webinar: A Tool for Process and Device Evaluation
by Tom Simon on 03-24-2016 at 12:00 pm
Categories: EDA, Primarius

Not only are foundries continuing to introduce processes at new advanced nodes, they are frequently updating or adding processes at existing nodes. There are many examples that illustrate this well. TSMC now has 16FF, 16FF+ and now 16FFC. They are also announcing 10nm and 7nm processes. In addition, they are going back to older… Read More

Posted on

Calibre in the Middle of Semiconductor Ecosystem

Calibre in the Middle of Semiconductor Ecosystem
by Pawan Fangaria on 12-20-2015 at 12:00 pm
Categories: EDA, Siemens EDA

Albert Einsteinhad said, “In the middle of difficulty lies opportunity”. In today’s world dominated by technology, or I must say internet which has initiated collaborative information sharing, “leading from the middle” is the new mantra of life.… Read More