EDAC Name Changing for ESDA, but what about IP ?

EDAC Name Changing for ESDA, but what about IP ?
by Eric Esteve on 04-14-2016 at 7:00 am

The EDA Consortium (EDAC) has changed name for Electronic Systems Design Alliance (ESD Alliance). That’s a good reminder that IC are developed (thanks to Design Automation) to be integrated into a System. A wide design ecosystem support system development, including embedded software, design intellectual property (IP), … Read More


2.5D supply chain takes HBM over the wall

2.5D supply chain takes HBM over the wall
by Don Dingee on 04-11-2016 at 4:00 pm

SoC designers have hit the memory wall head on. Although most SoCs address a relatively small memory capacity compared with PC and server chips, memory power consumption and bandwidth are struggling to keep up with processing and content expectations. A recent webinar looks at HBM as a possible solution.… Read More


New CoreLink IP ties in mobile GPU coherently

New CoreLink IP ties in mobile GPU coherently
by Don Dingee on 10-29-2015 at 7:00 am

A mobile GPU is an expensive piece of SoC real estate in terms of footprint and power consumption, but critical to meeting user experience demands. GPU IP tuned for OpenGL ES is now a staple in high performance mobile devices, rendering polygons with shading and texture compression at impressive speeds.

Creative minds in the desktop… Read More


Tensilica 4th generation DSP IP is a VPU

Tensilica 4th generation DSP IP is a VPU
by Eric Esteve on 10-12-2015 at 7:00 am

You may not know Tensilica DSP IP core, but you probably use Tensilica DSP powered systems in your day to day life. Every year, over 2 billion DSP cores equip IC in thousands of designs supporting IoT, Mobile Phones, Storage/SSD, Networking, Video, Security, Cameras… and more. Why DSP processing, the foundation of all Tensilica… Read More


Processors Rule the Day

Processors Rule the Day
by Tom Simon on 10-09-2015 at 7:00 pm

It used to be that if you went to a processor conference, you could expect to spend hours listening to talks about pipelining, cache schemes and processor architecture. Well, I went to the Linley Processor Conference this week in Santa Clara and found the topics pretty compelling. Processors are in just about everything. It is easier… Read More


Can the Likes of iPhone 6s Bring New Disruptions?

Can the Likes of iPhone 6s Bring New Disruptions?
by Pawan Fangaria on 09-30-2015 at 12:00 pm

In more than 30 years of semiconductors, we have seen many technology-induced disruptions in our ecosystem, be it healthcare, consumer, mobile, aerospace, or any other field for that matter. To name a few are portable healthcare devices at much lower prices, video conferencing over internet that reduced the need of physical … Read More


How Emulation Enables Complex Power Intent Modeling

How Emulation Enables Complex Power Intent Modeling
by Pawan Fangaria on 07-15-2015 at 12:00 pm

As the number of CPU, GPU, and IP is growing in an SoC, power management is becoming more and more a complex task in itself. A single tool or methodology may not be enough for complete power management and verification of an SoC. In an SoC, there can be multiple modes of operations involving hardware and software interactions, different… Read More


Why is Intel going inside Altera for Servers?

Why is Intel going inside Altera for Servers?
by Eric Esteve on 06-02-2015 at 12:30 pm

You should be happy to listen that Intel will buy Altera FPGA challenger, if you expect always more power to be consumed in datacenter! In 2013 the power consumption linked with the Servers and Storage IC activity, plus the electricity consumed in the systems cooling these high performance chips has reached 91 BILLION KWh (or the… Read More


SoCs in New Context Look beyond PPA

SoCs in New Context Look beyond PPA
by Pawan Fangaria on 03-21-2015 at 7:00 am

If we look back in the last century, performance and area were two main criteria for semiconductor chip design. All design tools and flows were concentrated towards optimizing those two aspects. As a result, density of chips started increasing and power became a critical factor. Now, Power, Performance and Area (PPA) are looked… Read More


How Imagination tested the PowerVR Series6XT

How Imagination tested the PowerVR Series6XT
by Don Dingee on 01-23-2015 at 10:00 pm

We have been hearing for some time about the Synopsys HAPS-70 and how they have co-created the hardware and software architecture for FPGA-based prototyping with their customers. Now, we see details published by Synopsys on how they collaborated with Imagination on the design of the PowerVR Series6XT GPU.

The first thing to come… Read More