Aldec tools and services have long been associated with FPGA designs. As FPGAs have evolved toward more RTL-based designs, the similarities between a modern FPGA verification flow and an ASIC verification flow often leave them looking virtually the same. … Read More
It’s been a busy few days here in Canyon Lake, and we’re ready to share exciting news in advance of #53DAC coming up on Monday, June 6[SUP]th[/SUP]. S2C is offering a technical program tutorial on “Overcoming the Challenges of FPGA Prototyping” followed by the launch of our latest book project, “PROTOTYPICAL”, including a field… Read More
The prototype is obviously the end goal of FPGA-based prototyping, however success of the journey relies on how quickly defects can be found and rectified. Winning in the debug phase involves a combination of methodology, capability, and planning. Synopsys recently aired a webinar on their HAPS environment and its debug ecosystem.… Read More
UVM has become a preferred environment for functional verification. Fundamentally, it is a host based software simulation. Is there a way to capture the benefits of UVM with hardware acceleration on an FPGA-based prototyping system? In an upcoming webinar, Doulos CTO John Aynsley answers this with a resounding yes.… Read More
Five minutes to ruin a reputation built over 20 years, as Warren Buffett put it, holds true in personal relationships. On the Internet of Things, reputations can disappear in five seconds. How do we move from merely intelligent Things to a level where devices have to be Trusted?… Read More
Sales says this next IoT project is going to be huge. Engineering isn’t so sure. Marketing says we should pilot it to find out. If it were just software, it might not be such a problem, but with hardware comes investment tradeoffs. Without guaranteed volumes of millions of units, are ASICs a realistic option to hit aggressive size,… Read More
FPGA-based prototyping firms are all grappling with the problem of higher speed connectivity between a development host and their hardware. Aldec is announcing their solution at DVCon 2016, turning to an AMBA AXI4 interface bridged into a host with PCIe x8.
Faster host interfaces deliver dual benefits in FPGA-based prototyping.… Read More
Hardware emulators and FPGA-based prototyping systems are descendants of the same ancestor. The Quickturn Systems Rapid Prototype Machine (RPM) introduced in May 1988 brought an array of Xilinx XC3090 FPGAs to emulate designs with hundreds of thousands of gates. From there, hardware emulators and FPGA-based prototyping … Read More
Kids have a tendency to put things in their mouths. Any parent can relate to the statement, “Put that down! You don’t know where it’s been!” After the first child, concern usually relaxes quite a bit. People joke about a 5-second rule on the premise if an object was just dropped on the floor, it may not be contaminated yet.… Read More
Success stories are great. Reading how someone uses a product contributes much more insight than reading about a product. Last month we had a teaser for a presentation by Wave Semiconductor; this month, we have the slides showing how they are using FPGA-based prototyping, AXI transactions, and DPI to speed up development.
First,… Read More
