Prototyping Over 100 Million ASIC Gates Capacity

Prototyping Over 100 Million ASIC Gates Capacity
by Daniel Payne on 05-10-2013 at 12:42 pm

Most SoCs today are being prototyped in FPGA hardware before committing to costly IC fabrication. You could just design and build your own FPGA prototyping system, or instead choose something off the shelf and then concentrate on your core competence of SoC design.

Thanks to the FPGA vendors like Xilinx we now have FGPA prototyping… Read More


Is my Library or Semi IP really OK to use?

Is my Library or Semi IP really OK to use?
by Daniel Payne on 05-10-2013 at 11:42 am

The tremendous growth in IC and SoC design complexity has now enabled engineers to place bilions of transistors on a single chip. To make that growth possible design teams resort to using libraries and semi IP provided by other groups in their company, or outside IP vendors. To lower risk, you must know that the IP being used in your… Read More


Forte CEO on Design and Verification Complexity

Forte CEO on Design and Verification Complexity
by Daniel Nenni on 05-10-2013 at 9:00 am

Sean Dart’s first DAC (Las Vegas) was as a customer in 1989. Designs were hitting 15,000 gates back then so he was looking for better schematic editors and simulators for gate level design. Fast forward 25 years and Sean’s customers are doing 15,000,000 gate subsystems and that number is growing steadily every year.… Read More


Modern SoC designs require a placement- and routing-aware ECO solution to close timing

Modern SoC designs require a placement- and routing-aware ECO solution to close timing
by Jamie Chen on 05-09-2013 at 9:30 pm

As an applications engineer for over 15 years supporting physical design tools that enable implementation closure, I have seen the complexity of timing closure grow continuously from one process node to the next. At 28nm, the number of scenarios for timing sign-off has increased to the extent that is way beyond the number that … Read More


Places Around the Austin Convention Center

Places Around the Austin Convention Center
by Paul McLellan on 05-09-2013 at 8:05 pm

Jerry Philippe used to work for me at Compass and then very briefly we worked together at VaST. Today he works for Calypto in Austin. And it is the Austin part that is important because Jerry knows where the places are in any city to get good food and drink but Austin is his home.

Austin has an extraordinary number of restaurants and bars.… Read More


Improving Design Practices for an Image Sensor IDM

Improving Design Practices for an Image Sensor IDM
by klujan on 05-07-2013 at 8:30 pm

With nearly twenty five years in business, Tanner EDA Application Engineers have seen a wide range of support requests. One consistent topic area is around design data management and design reuse. In one recent instance, our customer, an IDM who produces imaging sensors for infrared vision systems, called on Tanners AE team for… Read More


Bangers: the Best Beer Bar in Austin; Live Oak Brewing, the Best Beer in Austin

Bangers: the Best Beer Bar in Austin; Live Oak Brewing, the Best Beer in Austin
by Paul McLellan on 05-07-2013 at 8:10 pm

OK, enough with all this semiconductor geeky stuff. The important thing about DAC is…where to go to eat to avoid standard issue convention center chicken Caesar salad.

And a 7 minute walk from the convention center is Bangers Sausage House and Beer Gardenwhere you can have the $8 “executive” lunch consisting… Read More


How To Design a TSMC 20nm Chip with Cadence Tools

How To Design a TSMC 20nm Chip with Cadence Tools
by Paul McLellan on 05-07-2013 at 8:10 pm

Every process node these days has a new “gotcha” that designers need to be aware of. In some ways this has always been the case but the changes used to be gradual. But now each process node has something discontinuously different. At 20nm the big change is double patterning. At 14/16nm it is FinFET.

Rahul Deokar and John… Read More


Wireless Algorithm Validation from System to RTL to Test

Wireless Algorithm Validation from System to RTL to Test
by Daniel Nenni on 05-07-2013 at 8:05 pm

LSK 1123

This year’s #50DAC will be chock-full of technical content because that is what attracts the masses of semiconductor professionals, like moths to a flame, or like me to a Fry’s Electronics store. Interesting note, I went to high school with Randy Fry. His Dad started the Fry’s supermarket chain which he sold… Read More


A Brief History of Dassault Systèmes

A Brief History of Dassault Systèmes
by Paul McLellan on 05-07-2013 at 8:05 pm

Dassault Systèmes (DS) was created in 1981 when a small team of engineers were spun out of Dassault Aviation. They were developing software to design wind-tunnel models and so reduce the cycle time for wind-tunnel testing, using surface modeling in 3D instead. The company entered into a distribution agreement with IBM that same… Read More