If one wireless IoT technology fit every possible use case, we would have one specification. Many tradeoffs – battery life, mobility, indoor coverage, licensed versus unlicensed spectrum, and more – have made for many potential solutions. A heated discussion right now is over the future of LPWAN technologies, with LoRA, SIGFOX,… Read More
Tag: dsp
Cadence DSPs float for efficiency in complex apps
Floating-point computation has been a staple of mainframe, minicomputer, supercomputer, workstation, and PC platforms for decades. Almost all modern microprocessor IP supports the IEEE 754 floating-point standard. Embedded design, for reasons of power and area and thereby cost, often eschews floating-point hardware… Read More
Design IP Growth Is Fueling 94% of EDA Expansion
Last June, the ESD Alliance (ESDA) has released Q1 2016 results for EDA (CAE, PCB & MCM and IC Physical), Silicon IP (SIP) and Services. Not a surprise for Semiwiki readers since 2013, the SIP category is recognized as the largest with $689 million revenues for the quarter, and four-quarters moving average increasing by 11.6… Read More
LTE Trajectory Places High Demands on Baseband Processing
LTE stands for Long Term Evolution, and that is exactly what is happening. At the Linley Mobile & Wearables Conference 2016 we received a preview of what is coming in the mobile and wearable markets. LTE is one of the biggest drivers in this entire domain. There was much discussion about the LTE Release 12 and how it increases bandwidth,… Read More
The Appeal of a Multi-Purpose DSP
When you think of a DSP IP, you tend to think of very targeted applications – for baseband signal processing or audio or vision perhaps. Whatever the application, sometimes you want a solution optimally tuned to that need: best possible performance and power in the smallest possible footprint. These needs will continue,… Read More
Bringing Human-Like Intelligent Vision Processing to Low-Power Embedded Systems
Semiconductor IP has always been one of the most interesting topics on SemiWiki. Since going online in January of 2011 there have been a total of 592 IP related blogs that have been viewed 2,581,118 times. 79 of those blogs have been about CEVA, the number one licensor of digital signal processing (DSP) IP for a wide range of power-efficient,… Read More
Fast Track to a reconfigurable ASIC design
Licensing IP can be a pain, especially when the vendor’s business model has front-loaded costs to get started. Without an easy way to evaluate IP, justifying a purchase may be tough. With more mid-volume starts coming for the IoT, wearables, automotive, and other application segments, it’s a growing concern. Flex… Read More
New CEVA X baseband architecture takes on multi-RAT
What we think of as a “baseband processor” for cellular networks is often comprised of multiple cores. Anecdotes suggest to handle the different signal processing requirements for 2G, 3G, and 4G networks, some SoC designs use three different DSPs plus a control processor such as an ARM core. That’s nuts. What is the point of having… Read More
Reconfigurable redefined with embedded FPGA core IP
On November 1, 1985, before anyone had heard the phrase field programmable gate array, Xilinx introduced what they called a “new class of ASIC” – the XC2064, with a whopping 1200 gates. Reconfigurable computing was born and thrived around the RAM-based FPGA, whose logic and input/output pins could be architected into a variety… Read More
Should there be a 5-second IoT chip rule?
Kids have a tendency to put things in their mouths. Any parent can relate to the statement, “Put that down! You don’t know where it’s been!” After the first child, concern usually relaxes quite a bit. People joke about a 5-second rule on the premise if an object was just dropped on the floor, it may not be contaminated yet.… Read More