Seminar: Mentor Forum for Tessent DFT 2019 India

Seminar: Mentor Forum for Tessent DFT 2019 India
by Daniel Payne on 09-17-2019 at 9:00 am

Overview

Test for the Autonomous Age

The seminar will focus on three key test challenges IC vendors face as they try to make the promises of the autonomous age a reality.

  • Implementing DFT on the very large designs and new compute architectures that are required for efficient AI and machine learning
  • Achieving high test quality and
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Can a hierarchical Test flow be used on a flat design?

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It is pretty common for physical layout to work from a flattened hierarchy for blocks or even full chips, even though the front-end design starts with a hierarchical representation. This was not always the case. Way back when, the physical layout matched the logical hierarchy during the design process. Of course, this led to all… Read More


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