I’ve used Aldec tools like their Verilog simulator (Riviera PRO) when teaching a class to engineers at Lattice Semi, so to get an update about the company I spoke with Dave Rinehart recently by phone. A big product announcement by Aldec today is for their ASIC prototyping system with a capacity range of 4 Million to 96 Million… Read More
A modern fab can cost as much as $10B dollars. That’s billion with a B. Since it has a lifetime of perhaps 5 years, owning a fab costs around $50 per second and that’s before you buy any silicon or chemicals or design any chips. Obviously anyone owning a fab had better be planning on making and selling a lot of chips if they are going to make… Read More
All semiconductor companies were caught up in ASIC in some way or another because of the basic economics. Semiconductor technology allowed medium sized designs to be done, and medium sized designs were pretty much all different. The technology didn’t yet allow whole systems to be put on a single chip. So semiconductor companies… Read More
In the early 1980s the ideas and infrastructure for what would eventually be called ASIC started to come together. Semiconductor technology had reached the point that a useful number of transistors could be put onto a chip. But unlike earlier, when a chip only held a few transistors and thus could be used to create basic generic building… Read More
In the embedded world that drives much of today’s ASIC innovation, there is no bigger name than ARM. Not to enter the ARM vs. Intel fray, but it’s no exaggeration to say that ARM’s impact on SoCs is as great as Intel’s on the PC. Few cutting edge SoCs are coming to market that do not include some sort of embedded… Read More
One of the truisms of today’s disaggregated semiconductor design and manufacturing model is counter-intuitive to the do-it-yourself focus that is at the heart of every engineer. And yet, time and time again, success rewards those who understand that with today’s ever increasing complexity, it is difficult, if… Read More
During my last Taiwan trip I also spent time with Global Unichip. Clearly, in order for the semiconductor industry to thrive we must enable design starts. With the rising costs and complexity of semiconductor design and manufacturing this is a much greater challenge which is why I’m so interested in GUC, for the greater good of the… Read More
Extrapolating the trends from last 20 years to the next ten suggests that we will be implementing a trillion transistors or more by 2020. At 20nm, with the chip sizes touching billions of transistors, the age old problem of how to implement a design in the most efficient manner remains unanswered. … Read More
Clearly one of the market trends proving troublesome in the traditional ASIC value chain is the lack of silicon correlated custom IP. And make no mistake, semiconductor IP is a critical decision since it drives both chip level and system level technology differentiation.
Under the traditional ASIC model, vendors had their own… Read More
Just how many hands have touched your SoC design by the time it goes to manufacturing? Clearly the more hands that touch it, the more complex the design is, making it more difficult to meet your product requirements. The commercial semiconductor IP dilemma is that not only are you using the same IP as your competitors, you are exponentially… Read More
