Integrity and Reliability in Analog and Mixed-Signal

Integrity and Reliability in Analog and Mixed-Signal
by Bernard Murphy on 07-18-2016 at 1:30 pm

In the largest and fastest growing categories in electronics – mobile, IoT and automotive – analog is playing an increasingly important role. It’s important in delivering high integrity power and critical signals to the design though LDO regulators and PLLs, in managing high speed interfaces like DDR and SERDES, in interfacing… Read More


Free Webinar: Designing Low-Power IoT Systems

Free Webinar: Designing Low-Power IoT Systems
by Daniel Nenni on 06-05-2016 at 7:00 am

As I have written before, IoT looks to be a key driver for design starts and future semiconductor revenue growth which is why we wrote “PROTOTYPICAL” and included a field guide to FPGA Prototyping. If you want to get funding for your new IoT chip project, having a working prototype is a good thing, absolutely. If you want to take a look… Read More


Power Noise Sign-off at #53DAC

Power Noise Sign-off at #53DAC
by Daniel Payne on 05-29-2016 at 7:00 am

When I hear the company name of ANSYS the first EDA tool category that comes to mind is power noise sign-off. Going to DAC is a great way to find out what’s new with EDA, IP and foundries. There are three places that you can find ANSYS at DAC this year:… Read More


"Re-Inventing" Tapeout Sign-off — Applying Big Data Techniques to Electrical Analysis

"Re-Inventing" Tapeout Sign-off — Applying Big Data Techniques to Electrical Analysis
by Tom Dillinger on 05-23-2016 at 7:00 am

A common SoC design methodology in current use starts with preparation of the physical floorplan — e.g., block/pin placement, global clock domain and bus signal planning, developing the global/local power distribution (and dynamic power domain management techniques). Decoupling capacitor estimated densities and… Read More


FinFETs, Power Integrity and Chip/Package Co-design

FinFETs, Power Integrity and Chip/Package Co-design
by Bernard Murphy on 02-18-2016 at 7:00 am

FinFETs have brought a lot of good things to design – higher performance, higher density and lower leakage power – promising to extend Moore’s law for a least a while longer. But inevitably with new advances come new challenges, especially around optimizing for power integrity in these designs.

One of these challenges is… Read More


EDA and the Big Short!

EDA and the Big Short!
by Daniel Nenni on 01-05-2016 at 8:00 pm

A funny thing happened while I was reading “The Big Short: Inside the Doomsday Machine”. The book explains the subprime mortgage crisis in painful detail by profiling several key players who predicted and profited from the bubble pop. As a home owner and faux slumlord I had a front row seat to this horror show so it was an interesting… Read More


Semiconductors Future Hinges on a Single Pillar

Semiconductors Future Hinges on a Single Pillar
by Pawan Fangaria on 01-03-2016 at 7:00 am

A unique phenomenon has started manifesting itself under the slew of mergers and acquisitions this year in the semiconductor landscape. This phenomenon is bound to intensify in the near future and would positions itself as a key factor for the future of the semiconductor industry. The winners and losers in the game would be determined… Read More


A Synergistic Chip-Package-System Analysis Methodology

A Synergistic Chip-Package-System Analysis Methodology
by Tom Dillinger on 12-23-2015 at 4:00 pm

Looking back, 2015 was a significant year for mergers and acquisitions in the EDA industry. The Semiwiki team maintains a chronology of major transactions here.

As I was reviewing this compendium, one of the entries that stands out is the acquisition of Apache Design Solutions by Ansys, Inc. a couple of years ago.

At that time, there… Read More


5 Verification Challenges of IoT Solved by Emulation

5 Verification Challenges of IoT Solved by Emulation
by Pawan Fangaria on 12-09-2015 at 4:00 pm

Software-centric Emulation environment takes the forefront in modern SoC verification. As more and more devices are IoT enabled, the SoCs have to make special provisions to factor many things including communication, power usage, and network switching, and so on. Also, the demand for an SoC (specifically for smartphone which… Read More