A Re-look at TI’s Businesses, Strategies & Future

A Re-look at TI’s Businesses, Strategies & Future
by Pawan Fangaria on 06-09-2014 at 8:00 am

In recent days I’ve seen several long discussions about Texas Instrumentslosing its grip in semiconductor industry when it came out of a business it was strong in, i.e. wireless business. It seems the semiconductor community has not digested the fact that TI, very rightly, came out of the OMAP business at the right time. The smartphone… Read More


Analog and Full Chip Simulation at Micron

Analog and Full Chip Simulation at Micron
by Daniel Payne on 05-08-2014 at 12:50 pm

IDM companies like Micronuse SPICE circuit simulators during the design phase in order to predict timing, currents and power on their custom IC chip designs at the transistor level. A senior memory design engineer at Micron named Raed Sabbahtalked today at a webinarabout how the embedded solutions group uses the FineSimcircuit… Read More


Secret of TI’s Success in Analog & Embedded Space

Secret of TI’s Success in Analog & Embedded Space
by Pawan Fangaria on 04-27-2014 at 7:30 am

Since I started looking at the ways Texas Instrumentsworks through its strategies, my belief is getting firmed up that this is one company which can always sail through rough waters during downturn and reap rich benefits during upturn. They regularly review their strategies and can predict ahead of time when the water is about … Read More


Automating Analog Verification in Virtuoso

Automating Analog Verification in Virtuoso
by Daniel Payne on 03-31-2014 at 2:00 pm

Digital designers have been automating the functional verification process for many years now, however when you talk to an analog designer about how they do verification you quickly realize that the typical process is quite ad-hoc and little automated. Necessity does create an opportunity so the software engineers at MethodicsRead More


TI’s Way of Strategies – Formation & Execution

TI’s Way of Strategies – Formation & Execution
by Pawan Fangaria on 02-26-2014 at 8:30 am

For a company to stand still and continually prosper even after facing several downturns in its career of 80+ years, and still move swiftly with strong commitment and confidence, its strategy has to be right and rock solid possessing sustainable competitive advantage, and of course it has to be an early mover in everything it does… Read More


ISSCC: Analog-Digital Converter in FD-SOI

ISSCC: Analog-Digital Converter in FD-SOI
by Paul McLellan on 02-20-2014 at 11:50 am

The International Solid-State Circuits Conference (ISSCC) was last week in San Francisco. Stéphane Le Tual, Pratap Narayan Singh, Christophe Curis, Pierre Dautriche, all from STMicroelectronics presented a paper on A 20GHz-BW 6b 10GS/s 32mW Time-Interleaved SAR ADC with Master T&H in 28nm UTBB FDSOI TechnologyRead More


The Leading Edge Depends on What You Are Doing

The Leading Edge Depends on What You Are Doing
by Paul McLellan on 12-06-2013 at 11:10 pm

At Semicon Japan a few days ago, Subi Kengeri of GlobalFoundries delivered the keynote. While he covered a number of topics, using Tokyo’s recent win of the 2020 Olympics as a hook, one major theme was the increasing importance of processes other than the bleeding edge digital processes that get all the news.

What is leading… Read More


TowerJazz and Silvaco BFF

TowerJazz and Silvaco BFF
by Paul McLellan on 11-15-2013 at 1:04 pm

Last week was the TowerJazz Technology Fair 2013. TowerJazz is the fourth biggest foundry in the world after TSMC, GF and UMC. They have fabs in Newport Beach (the old Jazz, itself with roots in Rockwell), two in Israel (the old Tower, with roots in National Semiconductor) and one in Japan (acquired from Micron). The technology fair… Read More


Cadence’s Mixed-Signal Technology Summit

Cadence’s Mixed-Signal Technology Summit
by Randy Smith on 10-28-2013 at 1:45 am

On October 10, I attended another Cadence Summit, this one titled the Cadence Mixed-Signal Technology Summit. Recently, I had written about the Cadence Silicon Verification Summit. The verification event was the first of its kind, and I thought it had terrific content. Being more of a digital guy myself, I was unaware that Cadence… Read More


Bringing Sanity to Analog IC Design Verification

Bringing Sanity to Analog IC Design Verification
by Daniel Payne on 05-24-2013 at 1:07 pm

Two weeks ago I blogged about analog verification and it started a discussion with 16 comments, so l’ve found that our readers have an interest in this topic. For decades now the Digital IC design community has used and benefited from regression testing as a way to measure both design quality and progress, ensuring that first… Read More