DAC: Tempus Lunch

DAC: Tempus Lunch
by Paul McLellan on 06-06-2013 at 4:03 pm

I had time for lunch on Monday. That is to say, there was a Cadence panel session about Has Timing Signoff Innovation has become and Oxymoron? What Happened and How Do We Fix It?

The moderator was Brian Fuller, lately of EE Times but now Editor-in-Chief at Cadence (I’m not sure quite what it means either). On the panel were Dipesh… Read More


DAC: Wally’s Vision

DAC: Wally’s Vision
by Paul McLellan on 06-06-2013 at 3:07 pm

One new feature at DAC this year is that several of the keynotes are preceded by a ten minute vision of the future from one of the EDA CEOs. Today it was Wally Rhines’s turn. Wally is CEO of Mentor Graphics. He titled his talk Changing the World Through EDA. Since EDA as we know it started in the late 1970s, the number of transistors… Read More


DAC: Gary Smith: Don’t Give Away Your Models

DAC: Gary Smith: Don’t Give Away Your Models
by Paul McLellan on 06-06-2013 at 4:10 am

As is now traditional, Gary Smith kicked off DAC proper (there were workshops earlier and some co-located conferences started days before). He started by dismissing the idea that it costs $170M to do an SoC design.

In fact he looked at 3 different cases. Firstly, the completely unconstrained design. Well, no design is completely… Read More


Kaufman Award: Chenming Hu

Kaufman Award: Chenming Hu
by Paul McLellan on 06-06-2013 at 3:44 am

This year’s Kaufman award winner is Chenming Hu. In contrast to previous years, this was presented on the Sunday evening of DAC instead of at a separate event in San Jose. Chenming’s career was reviewed by Klaus Schuegraf, Group Vice President of EUV Product Development at Cymer, Inc (now part of ASML) and also one of… Read More


ARM @ #50DAC

ARM @ #50DAC
by Daniel Nenni on 05-31-2013 at 10:00 pm

The 2013 Design Automation Conference celebrates its 50th anniversary Sunday, June 2 through Thursday, June 6 at the Austin Convention Center. DAC is the world’s leading technical conference and trade show on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does… Read More


SemiWiki Top 10 Must See @ #50DAC List!

SemiWiki Top 10 Must See @ #50DAC List!
by Daniel Nenni on 05-31-2013 at 7:45 pm


This list was compiled by the SemiWiki bloggers highlighting emerging technologies that we have written about and that will be demonstrated at the Design Automation Conference next week. We highly recommend you investigate them further during your time in Austin and please let us know what you think.

Today SemiWiki has more than… Read More


Cooley’s Cheesy Must See List for DAC is Out

Cooley’s Cheesy Must See List for DAC is Out
by Paul McLellan on 05-31-2013 at 6:23 pm

One of the other increasingly successful channels (besides Semiwiki of course) for EDA, IP and semiconductor companies to reach potential customers is John Cooley’s DeepChip. Every year he puts a lot of effort into trying to find out who is exhibiting what at DAC and which stuff seems like it is new and maybe important, and… Read More


DAC lunch seminar: Better IP Test with IEEE P1687

DAC lunch seminar: Better IP Test with IEEE P1687
by Beth Martin on 05-30-2013 at 7:28 pm

What: DAC lunch seminar (register here)
When: June 5, 2013, 11:30am – 1:30pm
Where: At DAC in lovely Austin, TX

Dr. Martin Keim of Mentor Graphics will present this overview of the new the IEEE P1687 standard, called IJTAG for ‘internal’ JTAG.

If you are involved in IC test*, you’ve probably heard about IJTAG. If you … Read More


Atrenta: Mentor/Spyglass Power Signoff…and a Book

Atrenta: Mentor/Spyglass Power Signoff…and a Book
by Paul McLellan on 05-30-2013 at 7:00 am

Today Atrenta and Mentor announced that they were collaborating to enable accurate, signoff quality power estimation at the RTL for entire SoCs. The idea is to facilitate RTL power estimation for designs of over 50M gates running actual software loads over hundreds of millions of cycles, resulting in simulation datasets in the… Read More


Advanced Verification – HW/SW Emulation – SoC/ASIC Prototyping

Advanced Verification – HW/SW Emulation – SoC/ASIC Prototyping
by Daniel Nenni on 05-29-2013 at 8:00 pm

market

Aldec, Inc. is an industry-leading Electronic Design Automation (EDA) company delivering innovative design creation, simulation and verification solutions to assist in the development of complex FPGA, ASIC, SoC and embedded system designs. With an active user community of over 35,000, 50+ global partners, offices worldwide… Read More