CircuitSutra Technologies at the 2024 Design Automation Conference

The Design Automation Conference (DAC) is a premier event that focuses on the design and automation of electronic systems. It is an annual conference that has been held since 1964, making it one of the longest-running and most established events in the field of electronic design automation (EDA).

DAC offers outstanding training, education, exhibits and superb networking opportunities for designers, researchers, tool developers and vendors. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE) and is supported by ACM’s Special Interest Group on Design Automation (SIGDA) and IEEE’s Council on Electronic Design Automation (CEDA).

CircuitSutra is one of the many companies supporting this industry-leading event.

CircuitSutra is in the business of developing fast simulation models of the semiconductor chips, SoC, IP, CPU & systems at a higher abstraction level using high level languages – SystemC, C++, Python. Its mission is to accelerate the adoption of advanced shift-left methodologies in the semiconductor industry.

CircuitSutra provides SoC Modelling Services, by setting up a world class modelling team to work as the extension of the customer;s team, either remotely or onsite at the customer;s office. It provides highly specialised SystemC training, which goes beyond the language teaching and covers the modelling techniques for specific abstraction levels. It also provides re-usable modelling methodology that helps the customers to get started quickly with their SystemC endeavours.

Traditional RTL-GDS flow is not sufficient to design the complex and powerful chips of today, and lots of design activities are being performed at an abstraction level above RTL. CircuitSutra augments RTL-GDS SoC design flow with SystemC / C++ based Shift-Left ESL methodologies to perform: HW-SW codesign, Pre-silicon firmware development through Virtual Prototypes, Architecture Analysis & Optimization,  High Level Synthesis.

At the higher abstraction level, simulation speed is very fast compared to the RTL. It is feasible to simulate the complete SoC or even the electronic system, together with the software.  The higher simulation speed is achieved by deploying the concepts like interface abstraction, timing abstraction and functionality abstraction. Interface abstraction is achieved by implementing the functionality at transaction level instead of pin level. For the SoC bus there is a standard TLM2.0, however for the other interfaces – LPDDR, HBM, UCIe, CAN, PCI, Ethernet etc.., the custom TLM has to be defined. Timing abstraction is achieved by removing the clocks and implementing the functionality in the loosely timed or untimed fashion. For every specific use case of the models, it has  to be carefully  analysed what part of the functionality is required to be implemented and what part need not be implemented. For example for the embedded software use case, we model only that much functionality which is visible to the software

Serving the industry since 2005, CircuitSutra is recognized as the de facto leader in SystemC modelling in India, and has now set up a team in Santa Clara to support the customers in North America. CircuitSutra started the India SystemC User Group conference in India in 2012, which was later merged with DVCon India. CircuitSutra was awarded by Accellera design systems to drive the standards in the Indian ecosystem. It is a highly focussed company with 100% focus on SystemC based shift-left methodologies, and having in-depth understanding of the domain.

Circuitutra invites you to meet them on the DAC exhibit floor booth#1328, and to attend their talk at the exhibit forum. You can contact CircuitSutra here to schedule a meeting.

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