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ESL Expertise when You Need It. Spinning Up Faster

ESL Expertise when You Need It. Spinning Up Faster
by Bernard Murphy on 12-30-2020 at 6:00 am

CircuitSutra min

System-level expertise, once the domain a few architecture specialists, is now shouldering its way everywhere into chip design and verification. In virtual modeling together with OS and application software certainly. That now couples into mixed-level system-verification, using different levels of abstraction for different… Read More


SystemC Methodology for Virtual Prototype at DVCon USA

SystemC Methodology for Virtual Prototype at DVCon USA
by Daniel Payne on 07-13-2020 at 10:00 am

Register Model min

DVCon was the first EDA conference in our industry impacted by the pandemic and travel restrictions in March of this year, and the organizers did a superb job of adjusting the schedule. I was able to review a DVCon tutorial called “Defining a SystemC Methodology for your Company“, given by Swaminathan Ramachandran… Read More


High-Level Synthesis and Open Source Software Algorithms

High-Level Synthesis and Open Source Software Algorithms
by Daniel Payne on 05-07-2020 at 10:00 am

hls flow min

The DVCon conference and exhibition finished up in California just as the impact of the COVID-19 pandemic was ramping up in March, but at least they finished the conference by altering the schedule a bit. Umesh Sisodia, CEO at CircuitSutra Technologies presented at DVCON on the topic, Using High-Level Synthesis to Migrate OpenRead More


System Level Flows for SoC Architecture Analysis and Design – DVCON 2020

System Level Flows for SoC Architecture Analysis and Design – DVCON 2020
by Daniel Nenni on 02-21-2020 at 6:00 am

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As a professional conference attendee I look for the most meaningful way to spend my time and workshops is one of the best. Especially when a customer is involved and there is no bigger EDA customer than Intel, absolutely.

System Level Flows for SoC Architecture Analysis and Design

Speakers:
Swaminathan Ramachandran – … Read More