For IC designers creating full-custom or AMS designs there are plenty of challenges to getting designs done right on the first spin of silicon. Let me give you a sneak peek into what’s being discussed at the EDA Tech Forum in Santa Clara, CA on March 10th that will be of special interest to you:
3D TSV (Through Silicon Vias) are gaining much attention and for good reason, they help to make our popular portable electronics quite slim and cost effective:
Panelists from the following companies will discuss: Is 3D a Real Option Today?
Rob Aitken, ARM Fellow, ARM
Bernard Murphy, CTO, Atrenta
Simon Burke, Distinguished Engineer, Xilinx
Kuang-Kuo Lin, Ph.D., Director, Foundry Design Enablement, Samsung
Juan Rey, Senior Engineering Director, Design to Silicon Division, Mentor Graphics
The TSMC AMS Design Flow 1.0 was announced back in June 2010, so come and find out what’s changed in the past 9 months. In contrast, the digital flow is already at rev 11.0, which indicates a much more standardized approach to convergence in the digital realm.
TSMC and Mentor will present on their AMS design flow:
Tom Quan, Deputy Director of Design Methodology & Service Marketing, TSMC
Carey Robertson, Director LVS and Extraction Product Marketing, Mentor Graphics
Custom physical design is getting more interoperable with standards arising like OpenAccess:
Learn how SpringSoft and Mentor are working together on signoff-driven custom physical design:
Rich Morse, Technical Marketing Manager, SpringSoft
Joseph C. Davis, Calibre Interface Marketing Manager, Mentor Graphics
The EDA Tech Forum is free to attend, however you’ll want to signup to reserve your spot today. This is a full-day event with other sessions that may answer some nagging questions that you have about AMS design tools and flows.