*Spoiler Alert: The Sky is Not Falling*
The TSMC Technology Symposium last month provided a much needed technology refresh to counter aging industry experts (they make their living selling reports) who have been somewhat negative on the future of the fabless semiconductor ecosystem. If the sky wasn’t falling who would buy the reports, right? Let’s take a look at what Handel Jones of IBS reported last year and sync it up with what we learned from TSMC executives and symposium attendees last month.
Handel’s Chicken Little Conclusions:
First: Handel is RIGHT about 28nm having a long lifetime and it just got longer with the announcement by Jean-Marc Chery, COO of ST Microelectronics:
“We have just signed a strategic agreement with a top-tier foundry for 28nm FD-SOI technology. This agreement expands the ecosystem, assures the industry of high-volume production of ST’s FD-SOI based IC solutions for faster, cooler, and simpler devices and strengthens the business and financial prospects of the Embedded Processing Solutions Segment.”
Sources point to SMIC and the expanding low cost China mobile market which makes complete sense if you understand FD-SOI. Handel Jones has a white paper out titled “Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets.“ Paul McLellan wrote about it here. The discussion in the comment section is worth a read, absolutely. Maybe Handel will update that white paper to include 28nm?
Second: Handel is WRONG about 20nm by one year. According to JK Wang, Vice President of Operations for 300mm fabs, TSMC will ship 300,000 20nm wafers in 2014 and 1,000,000 20nm wafers in 2015. The symposium attendees I spoke with confirmed 20nm is now in production with plenty of time for the holiday gift season.
Third:Handel is WRONG again about FinFETs by another year. According to JK Wang, 900,000 16nm wafers will ship in 2015 and 1,300,000 wafers will ship 2016. Samsung supports this timeline saying 14nm will be in full production in 2015. And again attendees confirmed this.
Fourth: Handle is WRONG about 10nm. According to Mark Lui, TSMC President and Co-Chief Executive Officer, 10nm will have multiple customer tapeouts in 2015 and risk production is planned for late 2016. 10nm is expected to provide a 25% performance increase, a 45% power reduction, and a 2.2X gate density increase over 14nm. 10nm will use existing immersion lithography equipment but will be “EUV compatible” if and when EUV is available. According to Paul McLellan, my goto lithography source, EUV is a big fat IF!
Symposium attendees were a bit more skeptical on 10nm arriving on time but both Samsung and TSMC insist 10nm is well within the 2 year process ramp window. Given the great progress on Gen1 FinFETS I will play along with Gen2 roadmaps for now, absolutely.
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