The Leading Edge Foundry Landscape

The Leading Edge Foundry Landscape
by Scotten Jones on 07-22-2014 at 7:00 pm

There have been a lot of interesting announcements and presentations lately from the leading edge foundries. Looking at all of this information, a pretty interesting picture begins to emerge.

TSMC
TSMC is far and away the world’s largest foundry. In their 2014-Q2 conference call TSMC outlined their expectations for the balance of 2014 out through 2015.

At 28nm TSMC has LP (low power), HP (high performance), HPL (low power with HKMG) and HPM (high performance mobile). All four processes are bulk planar process with gate-last HKMG except LP that is polysilicon and SiON. At 28nm TSMC had the dominant market share, Samsung captured the Apple processor business and TSMC pretty much had everything else.

TSMC is now ramping 20nm (bulk planar process), they are expecting 20nm to be 10% of revenue in Q3 and 20% in Q4. Furthermore TSMC expects 20nm to be >20% of revenue for 2015. TSMC expects to dominate 20nm and discussed a major competitor skipping 20nm (without naming names, but we will get to who it is later). On TSMC’s web site they report that 20nm gives a 1.9x density improvement over 28nm.

At 16nm TSMC will not be ramping until Q3 of 2015 (FinFET on bulk process). Due to competitors having 14nm in the market in the first half of 2015 TSMC expects to initially have no share and lower share for 2015 in total. Longer term, TSMC expects to catch up and they expect that the combined 20nm/16nm market share will be higher than anyone else throughout 2014, 2015 and 2016. As a side note the development and design cycles are long enough that TSMC has a lot of visibility on who their customers will be all the way through 16nm. The 16nm process is a 16nm FinFET on bulk front end with the 20nm backend. I haven’t seen any statements from TSMC on overall density improvements but I have heard approximately 1.05x

For 10nm TSMC is forecasting 2.2x density improvement (FinFET on bulk). They declined to give any specific guidance on timing.

Also read: The Great 28nm Debacle!

Samsung
Samsung is the world’s third largest foundry. Dan Nenni recently published an interesting article on Samsung on Semiwiki and that article includes a link to a Samsung foundry presentation. The presentation discusses 28nm and 14nm but not 20nm so presumably Samsung is the competitor TSMC is referring to as “skipping” 20nm. This is particularly interesting because I had seen reports not that long ago that Samsung was going to be making at least some 20nm processors for Apple. I can only guess, but perhaps Apple went 100% with TSMC at 20nm and Samsung abandoned 20nm due to lack of customers.

At 28nm Samsung has 28LPS (cost effective), 28LPP (low power RF enabled), 28LPH (high performance) all planar on bulk and 28FD-SOI high performance “20nm performance at 28nm cost”. Given that Samsung is skipping 20nm it looks very likely that Samsung has licensed 28 FD-SOI technology to fill the 20nm gap. Samsung is gate-first for HKMG.

At 14nm Samsung has 14LPE (FinFET on bulk) as their fast time to market product and 14LPP (FinFET on bulk) as their second generation performance boosted product. 14LPE is qualified now and 14LPP is due in Q1-2015. Dan Nenni has suggested that Apple will go sole source with TSMC at 20nm and then jump back to Samsung at 14nm. Samsung’s 14nm should ramp late 2104 and early 2015 and represent the 14nm/16nm market share loss TSMC mentioned.

Samsung also reports that 14nm will have 0.55x the area of 28nm (for both LPE and LPP), that is a 1.82x density improvement. If TSMC sees a 1.9x improvement for 20nm over 28nm and another 1.05x at 16nm over 20nm, they would see a 2.00x density improvement for 16nm versus 28nm (please note TSMC’s 16nm process is really what everyone else is calling 14nm, the number 14 is apparently unfavorable in Taiwan). Assuming both companies have similar density at 28nm then TSMC could potentially have a density advantage at 16nm.

Also Read: Samsung Foundry Explained!

Global Foundries
Global Foundries is the world’s second largest foundry.

At 28nm according to the Global Foundries web site they have 28HPP high performance and 28SLP super low power. These appear to both be bulk planar processes. Global Foundries is also known to have FD-SOI technology but I don’t see it listed. I have heard Global Foundries is backing off of FD-SOI but I haven’t seen anything from the company one way or the other. It may be that their 28nm FD-SOI is supporting ST Micro (I have heard they have a manufacturing agreement with ST Micro) and they aren’t pushing it for general foundry usage. Global Foundries is gate-first HKMG.

At 20nm Global Foundries also has a bulk planar process 20LPM listed on their web site but I have heard they are abandoning it.

At 14nm Global Foundries has licensed Samsung’s FinFET on bulk technology and the two companies will offer capacity from Global Foundries Fab 8 and Samsung fabs S1, S2 and S3.

Also read: Samsung ♥ GLOBALFOUNDRIES

UMC
In recent years UMC has fallen from second in the foundry rankings to fourth just behind Samsung (although some rankings still have them slightly ahead of Samsung).

According to UMC’s web site they have 28LP low power, 28HLP high performance low power and 28HPM high performance mobile. These are all bulk planar processes. UMC use gate last HKMG.

I see no signs of a 20nm offering from UMC. I have heard they are working on 14nm FinFET on bulk technology with partners.

SMIC
The fifth largest foundry, SMIC is just now ramping 28PS and 28HK 28nm bulk planar processes. Reportedly SMIC has gone to gate last HKMG to be TSMC compatible. There are also rumors that SMIC is looking at 28nm FD-SOI but since FD-SOI is gate first this would be challenging to adopt. FD-SOI at 28nm does make a lot of sense to me for SMIC because it gives them a 20nm competitor without having to develop 20nm.

IBM

IBM is the eleventh largest foundry in the world. Traditionally IBM has offered leading edge capability but with the semiconductor unit rumored to be up for sale and shrinking it isn’t clear how long IBM will be available as a source.

Also Read: IBM and GLOBALFOUNDRIES Deal!

Intel
Intel is currently pretty far down the foundry ranking but with leading technology, the world’s largest semiconductor company has the potential to be a player. Intel currently has 22nm FinFET on bulk production and 14nm FinFET on bulk prototype foundry parts shipping to customers. We should see production 14nm foundry parts late this year or early next year.

Also read: Intel Custom Foundry Explained!

Discussion
Reviewing all this information there are several interesting observations I would like to make:

  • TSMC has had the leading market share at 28nm since the technology was introduced. 28nm options now include TSMC, Global Foundries, Samsung, UMC, SMIC and IBM plus 22nm from Intel. I would expect significant price erosion at 28nm going forward as these companies compete for share. I do think TSMC as the first company to ramp 28nm has a lot of designs locked in and they will be insulated from a lot of the competition due to the difficulty of moving to another foundry once a part is qualified. Samsung is also somewhat insulated due to the Apple business at 28nm. The rest of the competitors will likely end up fighting it out on price.
  • At 20nm I expect TSMC to again have the largest share. The only other options I currently know of are Global Foundries for 20nm bulk planar (if they are even still pursuing it) or a 28nm FD-SOI design at Samsung. Depending on whether you position Intel’s 22nm process against 28nm or 20nm that is another possible option. The bottom line is TSMC appears to be positioned to dominate this node.
  • At 14nm, Samsung with Global Foundries as a second source are first to market and will likely yield some benefit from this. Later on TSMC should build share as their committed customer’s ramp up in the second half of 2015. Intel also has announced customers but they are lower volume. It looks like the big battle here will be TSMC versus Samsung with Global Foundries and Intel playing smaller roles.
  • 10nm is a wide open battleground right now and the race will be interesting to watch.
  • ​I have not seen any of the foundries talk about or commit to 14nm FD-SOI. Clearly ST Micro is pursuing it but I will be very interested to see whether any of the Semiwiki readers are aware of any of the foundries pursuing it.

The iPhone6 will have TSMC 20nm, Absolutely!

The iPhone6 will have TSMC 20nm, Absolutely!
by Daniel Nenni on 07-13-2014 at 11:00 am

TSMC 20nm is one of the most talked about nodes on SemiWiki with lots of speculation and debate surrounding it. It’s interesting to look back at what we thought would happen to see if it actually did happen so let’s do that now. According to Google there are 411 articles referencing 20nm on SemiWiki, let’s visit a couple of the more interesting ones written by me (of course). This article is really for my beautiful wife and four children who rarely think I’m right so please don’t point out where I was wrong:

3D Transistors @ TSMC 20nm!
by Daniel Nenni
Published on 11-06-2011
Ever since the TSMC OIP Forum where Dr. Shang-Yi Chiang openly asked customers, “When do you want 3D Transistors (FinFETS)?” I have heard quite a few debates on the topic inside the top fabless semiconductor companies. The bottom line, in my expert opinion, is that TSMC will add FinFETS to the N20 (20nm) process node in parallel with planar transistors and here are the reasons why:

Dragon Boats and TSMC 20nm Update!
by Daniel Nenni
Published on 07-01-2012
Even more exciting, TSMC has 20nm up on the TSMC website now! Exciting for me at least! This is really cool stuff and it is right around the corner. I also like the new TSMC website and banner ads. It really does show a much more progressive communication style for a foundry…… Expect 20nm risk production to start in Q4 2013, two years to the quarter after 28nm.

Apple Will NOT Manufacture SoCs at Intel
by Daniel Nenni
Published on 12-09-2012
My bet is: moving forward Apple will use Samsung for 28nm (iPhone 5s) and TSMC for 20nm (iPhone 6). Intel certainly has a shot at 14nm and 10nm but never ever count out TSMC. If you want to bet a lunch on Apple manufacturing at Samsung or Intel for 20nm post it in the comment section. I will cover all lunch bets against TSMC.

TSMC 28nm and 20nm Update Q4 2012
By Daniel Nenni
Published on 12-16-2012
20nm will be a much more interesting node in regards to competition however. After learning the gate-first lesson, IBM is following TSMC with a gate-last HKMG implementation at 20nm. Unfortunately the added difficulty of 20nm double patterning and lithography challenges, which have yet to be solved at a production level, is causing delays. The fabless semiconductor ecosystem is working around the clock on this and I honestly expect a hockey stick 20nm production curve once this has been solved.

TSMC Apple Rumors Debunked!
by Daniel Nenni
Published on 01-11-2013
The first rumor is that the next Apple A7 processor (28nm) will be made by TSMC. That rumor is FALSE! As I previously blogged, the Apple iPhone to be released this year (iPhone 5s) will be Samsung 28nm. The iPhone to be released next year (iPhone 6) will be TSMC 20nm. A company the size of Apple cannot switch foundries on a moment’s notice. The volumes are too high and the technology issues are too complex. I have no doubt Apple discussed 28nm with TSMC but since no other foundries had 28nm available there was no way TSMC could handle the wafer demands of Apple and the rest of the fabless companies. Apple also gets preferred pricing so why would TSMC give up higher margin 28nm business AND alienate their customer base? Not going to happen….

Where will Apple Manufacture the next iPhone Brain?
by Daniel Nenni
Published on 07-17-2013
There still seems to be a lot of confusion here so let me set the record straight. In regards to the Apple Ax SoC, the Apple iPhone 5s will have Samsung 28nm Silicon. Samsung 28nm is still ramping but Samsung can make enough wafers and eat the yield issues no problem. The Apple iPhone 6 in 2014 will have TSMC 20nm as I reported previously.

Also read: Intel 14nm Delayed Yet Again?

More Articles by Daniel Nenni…..


The Great 28nm Debacle!

The Great 28nm Debacle!
by Daniel Nenni on 07-06-2014 at 9:00 am

40nm was a big node while I was Director of Foundries at the IP company Virage Logic which was later acquired by Synopsys. 40nm was big because the top fabless companies multi-sourced designs from one foundry to another with relative ease to get the best wafer prices. It was also the node where some of the big IDMs went fab-lite moving their leading edge IP and designs to the pure-play foundries.

I totally get the need for multi-sourcing. In my personal life I multisource my technology needs so I’m not beholden to any one company. I use FireFox for browsing, Yahoo for news, Google for search and maps, iPhones and iPads, Microsoft based laptops, it seems like human nature 2.0. In business however it’s a double edged sword, absolutely.

Since TSMC was first to 40nm, they did most of the heavy lifting only to see mass production moved to UMC, Chartered, and SMIC. I remember feeling bad for the TSMC wafer sales team doing all the work and not getting the appropriate rewards. I also remember wondering about the TSMC IP embedded in the GDS II design data (design rules etc…) moving about the world. Some fabless companies did their own design rules as a superset of the foundries to make sure designs were portable. Others just handed over TSMC GDS II and said, “Make this please.”

28nm changed things of course when TSMC was the only foundry to yield so it was the first and last full node for single source manufacturing we will ever see, my opinion. The TSMC 28nm fabs have been pretty much full since the first wafers shipped in Q4 2011. 28nm wafers were even on allocation at times which made the entire fabless semiconductor ecosystem uneasy. It also hit the fabless margins hard since TSMC did not have any pricing pressure. Considering what happened at 40nm the record high 28nm margins TSMC realized were well earned.

I remember the fabless quarterly conference calls in 2012 where the CEOs blamed 28nm wafer shortages for earnings misses which implied TSMC was not doing their job. It would have been nice if the CEOs were a bit more humble and admitted that TSMC did in fact ship the wafers under contract and it was their reliance on multi-sourcing that did them in this time. TSMC could have certainly built out enough 28nm capacity to prevent shortages had they been asked, right?

The 28nm landscape is changing again now that UMC, SMIC, GF, and Samsung are yielding enough to make a profit. Not the same profit as TSMC of course since they have the best yield and the fabs have been paid for many times over the last 2.5 years. At the same time TSMC is the only fab to ramp 20nm with production parts from Xilinx (FPGA), QCOM (modem), and Apple (SoC) hitting the market this year so the margins will keep pouring in.

“Handel Jones is WRONG about 20nm by one year. According to JK Wang, Vice President of Operations for 300mm fabs, TSMC will ship 300,000 20nm wafers in 2014 and 1,000,000 20nm wafers in 2015.

The TSMC Q2 2014 conference call on July 17[SUP]th[/SUP] will reveal just how much 20nm revenue will be recognized so let’s talk after that.


Cliff Hou’s DAC Keynote

Cliff Hou’s DAC Keynote
by Paul McLellan on 06-23-2014 at 10:21 am

Cliff Hou had two major appearances at DAC this year. He gave the opening day keynote…and he wrote the forward to Dan and my bookFabless: the Transformation of the Semiconductor Industry which about 1500 lucky people got a copy of courtesy of several companies, most notably eSilicon who sponsored the Tuesday evening post-conference party where we signed several hundred copies. You can still get a copy if you missed out, just click on the book cover on the top left hand side of the front page of SemiWiki.

Cliff’s keynote was about the future challenges of getting to 10nm and beyond. 14/16nm (they are basically the same despite the different numbers) are pretty much a done deal. Not yet in volume production but on track to get there later this year.

Cliff started by talking about mobile which is what drives semiconductor leading edge processes. Design innovation drives process innovation which enables more design innovation. As a result we have product innovation. It seems like we have always had smartphones but in fact the iPhone only came along 7 years ago. Up until then we had dumbphones although some marketing guy at Nokia cleverly called them feature phones to make them seem…almost smart.

Of course every process generation things get harder. Double patterning, FinFETs, multiple-patterning and so on. The big challenge is that as we approach 10nm, everything becomes more costly and so the economic driver that has been behind the semiconductor industry for the last few decades is weakening. It seems clear that the technical challenges can be overcome but at what cost?

There are two different sets of challenges getting to each new process node: the process issues, mostly around lithography, and the ecosystem issues.

  • lithography: continue to scale 193nm immersion
  • device: continue to deliver 25-30% speed gain at the same or reduced power
  • interconnect: address escalating parasitics
  • production: ramp volume in time to meet end-customer demand
  • shortened development runway to meet product windows

Design and technology co-optimization used to be fairly straighforward. The best local optimum was also the best overall optimum: shortest wire length the best, best gate-density the best area scaling, best technology also best cost. But these rules don’t hold any more. Everything has to be co-optimized from process, EDA tools and IP. If one of these is not up in time then the designs cannot be completed and the fab will not be filled as soon as capacity is available. And given the cost of a fab at $5-8B then a fab that is not full costs a huge amount in depreciation.


The time to get to market is speeding up too. First test chip, first PDK, first shuttle, volume production, the big milestones on a new node are getting compressed. At 10nm, Cliff reckons they will be roughly half the time they had at 28nm. The cost of bringing the process up and building the fabs to run it makes it imperative to start recovering the cost as soon as possible.


Bottom line: this all requires much closer collaboration between all the partners to make everything work in a timely manner. This is the key to unlock 10nm and beyond and turn the vision into reality.


More articles by Paul McLellan…


TSMC (TSM) is Having Another SoC Year!

TSMC (TSM) is Having Another SoC Year!
by Daniel Nenni on 06-18-2014 at 9:00 am

TSMC’s stock has more than doubled in the last five years. Coincidentally that is when I started blogging about TSMC. QCOM stock has experienced a similar doubling during this time as have other TSMC customers. The question is: What is next for TSMC? As I have mentioned before, you would be better off taking stock tips from your dog but this is what I see for this year and next for TSM.

Apple will become one of TSMC’s largest customers in 2014. This is simply amazing to me as I grew up with Apple as a computer hobbyist. Apple started selling mother boards before selling complete computer systems. In fact, I was at the UC Berkeley Campus when Steve Jobs entered wearing a backpack with a Macintosh computer inside ushering in a new era of personal computing. And now Apple is one of the largest fabless semiconductor companies? It boggles the mind!

The quarterly wafer ramping numbers I have read for Apple are $0 to $700M per quarter this year starting in Q2 2014 and up from there depending on the success of the iPhone6 and iPads to be announced later this year. As I have mentioned before, I predict that the iPhone6 will break revenue records and it is filled with TSMC silicon, absolutely. Given that TSMC will ship 300,000 20nm wafers in 2014, Apple will probably consume most of them. The other SoC vendors are still scrambling to get 64-bit 20nm SoCs taped-out. Apple really disrupted the SoC business with their 64-bit A7!

In 2015 Apple business could result in an additional $1B per quarter for TSM. Based on what I heard at #51DAC the TSMC/Apple relationship will continue into the FinFET era. One interesting note; I saw quite a few Apple badges at #51DAC, which was not the case at #50DAC. Those Apple engineers are becoming more plentiful and less stealthy it seems.

QCOM however is TSMC’s largest customer. QCOM consumed a record number of wafers last year, roughly a 50% YoY increase. FinFET is the big question, will they go TSMC or Samsung? I can tell you for a fact that QCOM will not use Intel Foundry, nor will any other SoC vendor that has a choice. It may have something to do with Intel flooding the market with free 22nm SoCs? Let’s see how many of those 40 million “contra revenue” parts actually make it into consumer’s hands. Ironically Intel will be using TSMC 28nm for their new Sofia SoC but I would not expect any volumes there either unless Intel goes contra revenue again.

The latest word from #51DAC is that QCOM will straddle TSMC and Samsung for FinFET wafers to get better margins. TSMC’s margins are at an all-time high (36%) and QCOM’s are at an all-time low (16%) so you do the math. A Samsung/QCOM foundry relationship seemed like a natural fit since Samsung is one of QCOM’s largest customers but with the launch of the Samsung Exynos SoC in 2010 the two companies are now frenemies. As they say, keep your friends close but your enemies closer. That is from the book “GodFather II” by the way. Michael Corleone said, “My father taught me many things here — he taught me in this room. He taught me — keep your friends close but your enemies closer.”

The other SoC vendor that I track is MediaTek. They are literally down the street from TSMC and UMC so I see them during my Taiwan travels. MediaTek is an interesting company that has done extremely well in the low end SoC business. I view MediaTek, TSMC, and UMC as brothers so I highly doubt they would use GlobalFoundries or Samsung but it is certainly possible. In this business margins are everything.


GDS II Online for TSMC

GDS II Online for TSMC
by Paul McLellan on 06-12-2014 at 4:00 pm

I just watched an interesting video of a demonstration at DAC of the eSilicon GDS II online quote for TSMC. Actually, it wasn’t so much as a demonstration as an interactive use of the quote tool using data supplied by a member of the audience.

The quote system works for TSMC processes from 28nm up to 350nm. The design the audience member wants quoted is a transceiver in TSMC’s 180nm process, mixed signal variant, with 6 layers of metal. The die size and package are specified (although for some reason that part of the video has been edited out).


A press of a button and the quote is created. It is very detailed.

  • package design $14,270
  • manufacturing services (test harness, probecards etc) $155,817
  • ESD qualification $9.500
  • test development $50,200
  • then there are lots of optional services that are priced such as burn-in, process corner analysis
  • lot buy pricing for 25,12 and 6 wafer lots at $73,866, $38,571 and $19,286 respectively, expected to yield 86,662 die, 41,598 die and 20,799 die
  • respin pricing (for a metal only change using some wafers held back at contact)

Finally the die price which is $2.35 assuming 90% wafer-sort yield (if the yield is 95% then $2.29 and at 85% $2.43).


The entire quote takes a little less than 10 minutes. And it is a quote not an estimate. Provided you don’t change anything (like the die size) then eSilicon stands behind the quote and will deliver all the services at the prices in the quote. Of course under the hood they have a TSMC price model built into the system, but that is transparent to you the customer. eSilicon takes care of all the negotiation with TSMC, the logistics of manufacturing, packaging, test, delivery and the various optional services, if any, that you have requested. Until recently, pricing a design was something that took a couple of weeks, and was anything but transparent. Now eSilicon, with the help of TSMC of course, have made something that used to take several weeks be just a few minutes.

Of course if something does change, for instance the die comes in larger or smaller than forecast when the quote was first done, then it only takes 10 minutes to generate a new quote and eSilicon will stand behind those revised prices. It is a big change from how I remember we used to do quotes when I was in the ASIC business in the 1980s.

Unfortunately eSilicon don’t have all the permissions they need to post the video so I can’t give you a link to it. I guess you just had to be there.


More articles by Paul McLellan…


TSMC vs Intel vs Samsung FinFETs

TSMC vs Intel vs Samsung FinFETs
by Daniel Nenni on 06-08-2014 at 10:50 am

By definition the pure-play foundry business model separates the design and manufacturing of a semiconductor device. TSMC was the first dedicated (pure-play) foundry which enabled the incredible fabless semiconductor ecosystem we have today. If not for the fabless business model we would not have the supercomputer class mobile devices in our pockets. We, as integral parts of the fabless semiconductor ecosystem, have changed the world, absolutely.

So the question is: As an executive for a fabless semiconductor company, why would you even consider turning back the clock and renting fab space from an IDM (a company that both designs and manufactures semiconductor devices)?

As a student of history I have always felt that it is critical to understand how you got to where you are today in order to predict where you will be tomorrow. As a 30 year veteran of Silicon Valley I have seen many companies succeed but I have also seen many more fail due to one fundamental truth, they failed at the future. In writing “Fabless: The Transformation of the Semiconductor Industry” Paul McLellan and I both agree that the key to the fabless business model is competition. Unfortunately, at 28nm there was no real foundry competition and that has opened the foundry business doors to IDMs once again.

You can’t fault TSMC. They executed at 28nm and were rewarded with a dominant market position. Had GlobalFoundries been able to provide a competitive 28nm offering I would not be writing this blog. Trust me on this: fabless semiconductor companies would NOT even consider doing business with an IDM foundry if they had two or more leading edge pure-play foundry options.

Intel thinks they are clever by getting into the foundry business. Unfortunately Intel is being used as a pawn in a very high stakes game of foundry chess. I also believe this to be true in the SoC business but that is another blog. Samsung on the other hand is a chess grandmaster which puts Intel between a serious rock (Samsung) and a very hard place (TSMC). Take a close look at Samsung’s latest announcements:

Samsung ♥ GLOBALFOUNDRIES

Samsung Endorses FD-SOI!

Both are excellent moves in becoming an integral part of the fabless semiconductor ecosystem. Samsung is also the only foundry to show working 14nm Silicon at the Design Automation Conference last week. My sources tell me that Samsung 14nm is 3-6 months ahead of TSMC’s 16FF+. My sources also tell me that TSMC 16nm FF+ is today the most competitive FinFET offering, meaning power, performance, area, AND cost. This is based on information from the associated PDKs and not from PowerPoint slides or press releases.

Competition is what drives the fabless semiconductor ecosystem and I thank Intel and Samsung for the investments they have made. If not for that competitive pressure we would not have the ultra-aggressive FinFET process development schedule nor would we have the competitive wafer pricing I have seen of late. Unfortunately all FinFET processes are not created equal so it will be difficult for the fabless companies to design to multiple foundries which mean there will be clear winners and losers in this game. If this was a horse race and I had to make a bet today it would be TSMC to win, Samsung to place, and Intel will not even show. Just my opinion of course.

More Articles by Daniel Nenni…..


TSMC: Keynote, OIP, 20nm, 16nm, panels, and more #51DAC

TSMC: Keynote, OIP, 20nm, 16nm, panels, and more #51DAC
by Paul McLellan on 05-28-2014 at 8:11 pm

What is TSMC doing at DAC?

The biggest event is presumably Cliff Hou’s DAC keynote on Monday at 3.25pm Industry Opportunities in the Sub-10nm Era. And he also wrote the foreword to Fabless, the book that Dan Nenni and I have written and where you can get a signed copy on Tuesday evening at the reception.

There is an IP workshop Driving Quality to the Desktop of the DAC Engineer which takes place on Sunday from 1-5pm in room 202 in the Moscone Center. This is presented by Steven Chen and Lluis Paris.

TSMC is participating in two panels. The first is on the IP track and is in room 101. Lluis Paris is moderating the topic of IP Quality. There is also a pavilion panel on Connecting Everything: Architecting the Internet of Things,Dan K is on the panel.

There are lots of presentations with TSMC’s partners, too many to mention.

TSMC themselves are on booth 1801. They will be talking a lot about IP quality. Have you noticed TSMC are very big on IP quality? They started just using software tools such as Spyglass for evaluating quality but they have now created a silicon validation lab in Taiwan to take it to the next level.


So the top level message is:

  • 20nm Complete

    • In mass production
    • Everything qualified and validated on customer designs
  • 16nm FinFET Complete

    • V1.0 Certification completed
    • IP silicon validated and available
    • Interface IP in silicon validation now
    • 16nm FinFET will be ready by end of year


One new thing you might not have heard is that there is a new 28HPC process offering. Spice corners have been tightened and there is a new signoff methodology. There is also a new high-efficiency 7-track library.

OIP is thriving. It has been running for over 12 years. The portfolio is impressive with over 7000 titles from 40 different IP vendors.


Overview of activities is here. Theater schedule on the booth is here.

Once again, TSMC’s booth is #1801.


More articles by Paul McLellan…


Motley Fools Intel Investors Again!

Motley Fools Intel Investors Again!
by Daniel Nenni on 05-22-2014 at 12:00 pm

It really is quite a racket. Investor bloggers spread semiconductor disinformation for $.01 per click, that coincidentally covers their stock positions, and I get paid $300 per hour to explain it to Wall Street. While I appreciate the opportunity to bond with the financial people, I do wonder how these bloggers sleep at night.

Here is the latest disinformation from Motley Fool:

While Taiwan Semiconductor (NYSE: TSM ) , Samsung (NASDAQOTH: SSNLF ) , and others have been claiming that everything is going swimmingly for production during 2014, the reality from the semiconductor equipment vendors’ point of view is a different one that should allow Intel (NASDAQ: INTC ) investors to breathe a sigh of relief.

My translation: Please don’t sell your Intel stock until I cover my position. The reality from the semiconductor equipment vendors is that they will miss Wall Street’s expectations so it’s finger pointing time. Just once I would like to hear a CEO on a conference call say, ”You know what, we screwed up, it’s all our fault, we deserve a stock downgrade.”

In short, while TSMC and Samsung talk a big game with respect to their FinFET nodes, the truth is that the foundries are having a difficult time getting the yields to be passable and seem to be quite a way from production. The question, then, is how far from volume production are the foundries?

Wait, did he just call TSMC and Samsung liars? At the 25[SUP]th[/SUP] Annual TSMC Technology Symposium last month customers (close to 1k people I would guess) got a complete update:

TSMC Updates: 20nm, 16nm, and 10nm!

Unfortunately or fortunately only semiconductor professionals were invited so the investor bloggers don’t know any better.

By the way, this particular investor blogger also published this:

Intel’s 14 Nanometer: It’s Here And It Kicks ButtSeptember 15, 2013
At the very first keynote by new Intel (INTC) CEO Brian Krzanich, I had a front row seat to the demonstration of the world’s very first, fully-working 14 nanometer microprocessor. Folks, this isn’t some “test chip”, but a bonafide, fully-functional, Windows-booting microprocessor that is set to go into production by Q4 2013.

Paul McLellan and I sat in the 5[SUP]th[/SUP] row and having published earlier that Intel 14nm would be delayed we were quite shocked. SemiWiki readers know the rest of this story, Brian K. had to eat crow in his next conference call and admit that 14nm would in fact be delayed. The 14nm microprocessor mentioned above is now set to hit shelves by Q4 2014.

So the truth is that Intel was having a difficult time getting the yields to be passable and seem to be quite a way from production.

As I mentioned before, disinformation is a competitive weapon and something publicly traded companies are good at. Most of these investor bloggers are spoon fed PR stuff, they cut and paste the rest to support what’s in the spoon. Add in the personal bias of owning the stock and you get a serious amount of disinformation, which is why Wall Street keeps calling.

Just my opinion of course! :rolleyes:

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TSMC Updates: 20nm, 16nm, and 10nm!

TSMC Updates: 20nm, 16nm, and 10nm!
by Daniel Nenni on 05-05-2014 at 2:30 pm

*Spoiler Alert: The Sky is Not Falling*
The TSMC Technology Symposium last month provided a much needed technology refresh to counter aging industry experts (they make their living selling reports) who have been somewhat negative on the future of the fabless semiconductor ecosystem. If the sky wasn’t falling who would buy the reports, right? Let’s take a look at what Handel Jones of IBS reported last year and sync it up with what we learned from TSMC executives and symposium attendees last month.

Handel’s Chicken Little Conclusions:

[LIST=1]

  • 28nm will have a long lifetime with opportunities for equipment vendors to expand capacity inside China
  • 20nm parametric yield will improve and it will be a high volume technology node in 2015 but mostly 2016.
  • 16/14nm will provide low cost gates with volume production only in 2017.
  • 10nm will be postponed. Cost per gate will be prohibitive and unclear where demand will come from outside high-speed processors and FPGAs.

    First: Handel is RIGHT about 28nm having a long lifetime and it just got longer with the announcement by Jean-Marc Chery, COO of ST Microelectronics:

    “We have just signed a strategic agreement with a top-tier foundry for 28nm FD-SOI technology. This agreement expands the ecosystem, assures the industry of high-volume production of ST’s FD-SOI based IC solutions for faster, cooler, and simpler devices and strengthens the business and financial prospects of the Embedded Processing Solutions Segment.”

    Sources point to SMIC and the expanding low cost China mobile market which makes complete sense if you understand FD-SOI. Handel Jones has a white paper out titled “Why Migration to FD-SOI is a Better Approach Than Bulk CMOS and FinFETs at 20nm and 14/16nm for Price-Sensitive Markets. Paul McLellan wrote about it here. The discussion in the comment section is worth a read, absolutely. Maybe Handel will update that white paper to include 28nm?


    Second: Handel is WRONG about 20nm by one year. According to JK Wang, Vice President of Operations for 300mm fabs, TSMC will ship 300,000 20nm wafers in 2014 and 1,000,000 20nm wafers in 2015. The symposium attendees I spoke with confirmed 20nm is now in production with plenty of time for the holiday gift season.

    Third:Handel is WRONG again about FinFETs by another year. According to JK Wang, 900,000 16nm wafers will ship in 2015 and 1,300,000 wafers will ship 2016. Samsung supports this timeline saying 14nm will be in full production in 2015. And again attendees confirmed this.

    Fourth: Handle is WRONG about 10nm. According to Mark Lui, TSMC President and Co-Chief Executive Officer, 10nm will have multiple customer tapeouts in 2015 and risk production is planned for late 2016. 10nm is expected to provide a 25% performance increase, a 45% power reduction, and a 2.2X gate density increase over 14nm. 10nm will use existing immersion lithography equipment but will be “EUV compatible” if and when EUV is available. According to Paul McLellan, my goto lithography source, EUV is a big fat IF!

    Symposium attendees were a bit more skeptical on 10nm arriving on time but both Samsung and TSMC insist 10nm is well within the 2 year process ramp window. Given the great progress on Gen1 FinFETS I will play along with Gen2 roadmaps for now, absolutely.

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