System-on-chip (SoC) devices are increasingly becoming more complex in terms of adding functionality yet they need to be more reliable and fault tolerant for automotive, aerospace and industrial electronics.
Arteris Inc.—which invented the network-on-chip (NoC) interconnect technology back in 2006—is now offering FlexNoC Resilience Package to allow SoC designers augment network-on-chip interconnect IP to boost safety and reliability in mission-critical electronics.
“It is part of the computational consolidation of the multicore SoC designs as CPU-only safety mechanisms like ECC and dual-core lockstep (DCLS) are not sufficient for automotive, aerospace, defense, industrial equipment and other electronics markets requiring fault tolerance,” said Kurt Shuler, VP of Marketing at Arteris. “The network-on-chip interconnect IP solutions like FlexNoC can serve as the central nervous system of an SoC with 150-200 blocks of communication.”
The SoC devices for safety-related applications in the automotive, industrial and medical markets usually use ARM Cortex-R5 and Cortex-R7 processors. These CPU core IPs implement techniques like ECC, parity data protection, DCLS redundancy, duplicate internal memories, safety checkers, and built-in self-test (BIST).
The CPU-only approach, however, falls short in providing the end-to-end protection of any or all IP-to-IP communication within the SoC. That’s where the resilience features for on-chip interconnect—like FlexNoc—come into play and provide support for ARM Cortex-R5 and Cortex-R7 processors port checking.
The FlexNoC Resilience Package enables the implementation of data protection and control features, and it doesn’t require the replacement of existing fabric IP or tools. The easy partitioning of SoCs means that IC designers can take an existing chip and specify which parts of an SoC require resilience and which do not.
FlexNoC Resilience Package block diagram
What is resilience? It’s the ability to maintain an acceptable level of service in the face of faults and challenges to normal operation. Digital ICs can fail in many ways. There could be glitches in power supply or clock supply leading to transient electrical problems, or there could be soft errors or physical damage.
How network-on-chip works
Tom Hackenberg, Principal Analyst, Automotive Embedded Processors, IHS Technology Inc., said: “A growing number of chipmakers are turning to safety and security optimized network-on-chip subsystems for SoCs, such as FlexNoC Resilience Package, to lower the development costs and time it takes to achieve the ISO 26262 certification, enabling both media-intense processing and certifiable mission-critical solutions in an integrated SoC.”
Take the automotive industry as a case study. Automotive OEMs are using high-performance SoC solutions common to the wireless market amid the growing demand for media-rich and telematics applications. However, they have to merge these SoC solutions with time-consuming and intense MCUs and CPUs that are ISO 26262 and ASIL certified, so that these SoCs can provide safe and reliable control systems. According to Hackenberg, while it’s common to design separate electronic control units, it can increase the cost and potentially add to driver distraction.
That’s where network-on-chip subsystems for SoCs come into the picture as a valuable piece of technology. The network-on-chip IP solutions like FlexNoC Resilience Package protect safety-critical portions of the entire CPU, SoC interconnect and memory path, and thus help OEMs create more reliable and fault tolerant systems in shorter time and with lower cost. Semiconductor vendors like Altera and Renesas have been using FlexNoC Resilience Package to make their SoC designs faster and more dependable.
More product details are available in the technical paper, “SoC Reliability Features in the FlexNoC Resilience Package.”
Image credit: Arteris Inc.
Majeed Ahmad is author of Age of Mobile Data: The Wireless Journey To All Data 4G Networks that chronicles the evolution of mobile data technology and how that eventually led to pure data LTE network architecture.