TSMC Describes Technology Innovation Beyond A14The inaugural event for the 2025 TSMC Technology…Read More
SNUG 2025: A Watershed Moment for EDA - Part 2At this year’s SNUG (Synopsys Users Group) conference,…Read More
Feeding the Beast: The Real Cost of Speculative Execution in AI Data CentersFor decades, speculative execution was a brilliant solution…Read More
LLMs Raise Game in Assertion Gen. Innovation in VerificationLLMs are already simplifying assertion generation but still…Read More
Automotive Functional Safety (FuSa) ChallengesModern vehicles have become quite sophisticated, like a…Read More
Atrenta Inc., the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow, announced today that it will participate in a worldwide social media platform aimed at facilitating mass communication for electronic design professionals through Web 2.0 technologies.… Read More
Unlike the last CES, this year I saw compelling technology, technology that will definitely drive the semiconductor industry and make the analyst fortunetellers look bad yet again. Anyone who thinks semiconductor growth next year will be in single digits is absolutely wrong, TSMC will grow even more, 20%+. First and foremost… Read More
At the EDAC CEO panel, Daniel pointed out that he used EDA360 as a good introduction to non-specialists (e.g. financial sector). I just discovered today that the cover article of PC Today is by John Bruggeman (well, Cadence) about EDA360. Having some idea of just how difficult it is to get that sort of specialist article into a general… Read More
First, lets review the business model transitions EDA has seen. We started with perpetual licensing which is a software license for the life of the product. EDA companies did their best to change product names to get incremental revenue above and beyond the yearly 15% maintenance fee but that is a dead end business model for a confined… Read More
I will share with you the most interesting I have heard during IP-SoC 2010, last December in Grenoble. Today, let’s summarize what I heard about the future of the IP business. The presentation was done by Gartner, in the “Auditorium” (largest room). It first started with the results for 2010, and I took some notes, as you can see the… Read More
Solidohas run an interesting survey on variation-aware design. The data is generic and not specific to Solido’s products although you won’t be surprised to know that they have tools in this area.
What is variation-aware design? Semiconductor manufacturing is a statistical process and there are two ways to handle this in the design… Read More
One of the important but often unrecognized aspects of engineering is re-building the infrastructure underneath key design tools. Sometimes this gives a new desirable capability but often a lot of the effort is simply to modernize the code base so that it is possible to continue development effectively going forward. For example,… Read More
I love SPICE and Fast SPICE circuit simulators, so here’s my feature list for the ultimate SPICE circuit simulator:
[LIST=1]
Is EDA still an appropriate term for what we do? What applications will drive future semiconductor design innovation? Will further consolidation be required for EDA to thrive again? They are all good questions, questions that will hopefully be properly addressed at the EDAC CEO Forecast and Industry Vision event next week but… Read More
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RISC-V Virtualization and the Complexity of MMUs