An Invited Talk at IEDM: Intel’s Mr. Transistor Presents The Incredible Shrinking Transistor – Shattering Perceived Barriers and Forging AheadIEDM turned 70 last week. This was cause…Read More
Certification for Post-Quantum Cryptography gaining momentumA crucial step in helping any new technology…Read More
IEDM Opens with a Big Picture Keynote from TSMC’s Yuh-Jier MiiThe main program for the 70th IEDM opened…Read More
How I learned Formal VerificationBing Xue is a dedicated Formal Verification Engineer at Axiomise,…Read More
…or a global recession, but that’s not the purpose of this blog. As everybody knows, Apple is designing and selling smartphones, only. Does it mean that only smartphones are generating profit in the mobile industry? As we have seen recently in Semiwiki, Apple makes 2/3 of profit of entire mobile industry.
Let’s have a look (below)… Read More
Don’t get me wrong, I’m a big fan of AMD, I buy AMD based products whenever possible to prevent an innovation stifling Intel monopoly. Unfortunately Silicon Valley coffee house conversations continue to paint a bleak picture for AMD, even with a recent stock surge on better than expected revenue guidance for the rest of 2011. I’m… Read More
The last of the current series of webinars is on Sentinel-PSI,IC-Package, Power and Signal Integrity Solution. It will be at 11am Pacific time on Thursday 11th August. It will be conducted by Dr. Tao Su, product manager of the Sentinel products. Dr. Su has many years of experience in the EDA industry and is specialized in power integrity… Read More
Intel will not win the tablet market with any of the various Atom chips rolling out at 32nm, 22nm and even 14nm. They are too late to a game that Apple owns 90% of today and will so in the future. All of these ultra low power atom versions are like the Saturn test rocket developments that preceded the Apollo 11 Moon Landing. They are necessary… Read More
…when Synopsys is getting the lion’s share in Interface IP. In Q2 2010, there was two major acquisitions in EDA world: Synopsys has bought Virage Logic (for more than $300M) when Cadence bought Denali for an equivalent amount. Synopsys bought a 100% IP focused company, when Cadence bought a strongly VIP focused company. Does it … Read More
I’ve blogged about the Calibre family of IC design tools before:
Smart Fill replaced Dummy Fill Approach in a DFM Flow
DRC Wiki
Graphical DRC vs Text-based DRC
Getting Real time Calibre DRC Results with Custom IC Editing
Transistor-level Electrical Rule Checking
Who Needs a 3D Field Solver for IC Design?
Prevention is Better… Read More
SNUG in Silicon Valley was in March so either you were there or you’ve missed it. But it is the summer (and fall) of SNUG in the rest of the world:
SNUG China (in Beijing, Shanghai, Shenzhen) on August 22nd-30th
SNUG Singapore on August 23rd
SNUG Taiwan (in Hsinchu) on August 25-26th
SNUG Japan (in Tokyo) on September 7th
SNUG … Read More
Formal verification has grown in importance as designs have grown and it has become necessary to face up to the theoretical impossibility of using simulation to get complete coverage along with the practical impossibility of simulating enough to even get close.
There are a number of solvers for what is called satisfiability (SAT)… Read More
The webinar on CPS (chip-package-system) is on Tuesday 9th August at 11am Pacific time. It will be conducted by Christopher Ortiz, Principal Application Engineer at Apache Design Solutions. Dr. Ortiz has been with Apache since 2007, supporting the Sentinel product line. Prior to Apache he worked at Agere / LSI, where he investigated… Read More
Generally if you want to read about power dissipation in SoCs and the potential impact on limiting how much computer power we might be able to cram onto a given piece of silicon then EE Times is a good place to look. But last weekend there was a full-length article in, of all places a different Times, the New York Times, entitled Progress… Read More
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