When Software Outruns Silicon: Hardware-Assisted Test Generation to the RescueFor the past decade, the semiconductor industry has…Read More
From Tokens to Infrastructure: Why Compute, Memory, and Power Will Determine the Future of AIBased on Dylan Patel’s SEMI Industry Strategy Symposium…Read More
Intel 18A vs Intel 18A-P: What Is the Difference and Why Does It Matter?Intel’s 18A process technology has become one of…Read More
WEBINAR: Why Google Cloud NetApp Volumes Matter for Modern EDA WorkloadsIn this webinar, Google Cloud and NetApp explore…Read More
How to Free Yourself from Inconsistent Engineering Documentation Before It’s Too LateEmbedded systems programs often fail because critical engineering…Read More
Every process node these days has a new “gotcha” that designers need to be aware of. In some ways this has always been the case but the changes used to be gradual. But now each process node has something discontinuously different. At 20nm the big change is double patterning. At 14/16nm it is FinFET.
Rahul Deokar and John… Read More
OK, enough with all this semiconductor geeky stuff. The important thing about DAC is…where to go to eat to avoid standard issue convention center chicken Caesar salad.
And a 7 minute walk from the convention center is Bangers Sausage House and Beer Gardenwhere you can have the $8 “executive” lunch consisting… Read More
This year’s #50DAC will be chock-full of technical content because that is what attracts the masses of semiconductor professionals, like moths to a flame, or like me to a Fry’s Electronics store. Interesting note, I went to high school with Randy Fry. His Dad started the Fry’s supermarket chain which he sold… Read More
For a couple of years the GSA has had working group looking at funding of semiconductor investment. There is a general feeling, which I share, that it is hard to get a fabless semiconductor company off the ground (nobody would dream of trying to create one with a fab these days) due to the size of the investment and the relatively long… Read More
You may have heard about cell-aware testing. It’s a transistor-level test (ATPG) methodology that is quickly becoming a hot topic. If you are involved in DFT and are looking for better quality and reliability, you should definitely know about cell-aware testing.
And lucky you, on May 16, 2013, you can attend a free seminar on cell-aware… Read More
Global Foundries will be at DAC in booth 1314. There will be 6 pods there demonstrating:
Dassault Systèmes (DS) was created in 1981 when a small team of engineers were spun out of Dassault Aviation. They were developing software to design wind-tunnel models and so reduce the cycle time for wind-tunnel testing, using surface modeling in 3D instead. The company entered into a distribution agreement with IBM that same… Read More
This is an example of what I do during the day. I work with emerging companies on disruptive technologies and help launch them into the fabless semiconductor ecosystem. This product, iDRM, is the result of three years of joint development work amongst three semiconductor foundries and some of their top customers:… Read More
Robert Veltman and Vikash Tyagi of SanDisk Corporation presented at SNUG a few weeks ago on their selection and use of RTDA’s NetworkComputer to manage their workflows.
Like everyone else, SanDisk has a high-performance computing farm (and like everyone else they are coy about how big it is) and lots of licenses for EDA tools,… Read More
This year for the first time the Thursday of DAC is tranining day. So that would be June 6th in Austin, of course. There are four tracks of training focused on SystemC, ARM Cortex and two on SystemVerilog, all areas of increasing use in SoC design, especially in mobile.
Each track of training is divided into two parts, one held from 9am… Read More
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Why Huawei Says It Will Match TSMC’s Most Advanced Chips by 2031