Looking at the huge gap between the revenue of semiconductor design and manufacturing (~$300B) and that of EDA tools, services and silicon IP combined (~6B) inspired me to look more deeply into the overall arena of semiconductors in today’s context and possibly decipher some trends which should emerge in near future. Although… Read More
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Apple blows away their numbers
Well it looks like everyone (including me) was way too conservative about Apple’s iPhone sales last quarter. Analysts were expecting Apple to sell 30M iPhones and 13M iPads. In fact they sold 37M iPhones, almost a quarter more than expected, and over 15M iPads. In fact Apple sold more iPads than HP, the largest PC manufacturer,… Read More
Apple’s Blowout Earnings: Welcome to 2012!
Apple’s blowout earnings for the quarter that just ended has huge ramifications for the entire semiconductor industry as suppliers align much closer to them or figure out how to minimize the damage that is to come through the rest of 2012. The immediate implication is that Wall St. will likely toss to the sidelines any semiconductor… Read More
Manage Your Cadence Virtuoso Libraries, PDKs & Design IPs (Webinar)
Users of Cadence Virtuoso tools for IC layout and schematics can make their design flow easier by using Design Data Management tools from ClioSoft. Keeping track of versions across schematics, layout, IP libraries and PDKs can be daunting. Come and learn more about this at a Webinar hosted by ClioSoft next Tuesday.… Read More
Going up…3D IC design tools
3D and 2.5D (silicon interposer) designs create new challenges for EDA. Not all of them are in the most obvious areas. Mentor has an interesting presentation on what is required for verification and testing of these types of designs. Obviously it is somewhat Mentor-centric but in laying out the challenges it is pretty much agnostic.… Read More
High Speed USB 3.0 to reach Smartphone & Tablets in 2012… but which USB 3.0?
If you are not familiar with SuperSpeed USB standard (USB 3.0), you may understand this press release from Rahman Ismail, chief technology officer of the USB Implementers Forum, as simply claiming that USB 3.0 will be used in smartphone & media tablet this year… but, if you are familiar with the new standard, you are just confused!… Read More
Analog Panel Discussion at DesignCon
DesignCon is coming up and the panel discussions look very interesting this year. The one panel session that I recommend most is called, “Analog and Mixed-Signal Design and Verification” which is moderated by Brian Bailey, one of my former Mentor Graphics buddies and fellow Oregonian.… Read More
Acquiring Great Power
“Before we acquire great power we must acquire wisdom to use it well”
Ralph Waldo Emerson
Making good architectural decisions for controlling power consumption and ensuring power integrity requires a good analysis of the current requirements and how they vary. Low power designs, and today there really aren’t… Read More
EDA Tool Flow at MoSys Plus Design Data Management
I’ve read about MoSys over the years and had the chance this week to interview Nani Subraminian, Engineering Manager about the types of EDA tools that they use and how design data management has been deployed to keep the design process organized. My background includes both DRAM and SRAM design, so I’ve been curious… Read More
Intel Aims for the Upper, Upper Decks
Since the introduction of Apple’s iPhone and then the follow on iPAD, it has been Wall Streets frame of reference that Intel would be playing defense as the PC market slid into oblivion and therefore a Terminal Value should be placed on the company. Intel’s Q4 2011 earnings conference call provided a nice jolt to the analysts as Paul… Read More
Intel’s Death Spiral Took Another Turn