TSMC Describes Technology Innovation Beyond A14The inaugural event for the 2025 TSMC Technology…Read More
SNUG 2025: A Watershed Moment for EDA - Part 2At this year’s SNUG (Synopsys Users Group) conference,…Read More
Feeding the Beast: The Real Cost of Speculative Execution in AI Data CentersFor decades, speculative execution was a brilliant solution…Read More
LLMs Raise Game in Assertion Gen. Innovation in VerificationLLMs are already simplifying assertion generation but still…Read More
Automotive Functional Safety (FuSa) ChallengesModern vehicles have become quite sophisticated, like a…Read More
Our EDA industry loves three letter acronyms so credit the same industry for creating a five letter acronym CoWoS. Two weeks ago TSMC announced tape-out of their first CoWoS test chip integrating with JEDEC Wide I/O mobile DRAM interface, making me interested enough to read more about it. At the recent TSMC Open Innovation Platform… Read More
Electromigration (EM) is a reliability concern for IC designers because a failure in the field could spell disaster as in lost human life or even bankruptcy for a consumer electronics company. In the old days of IC design we would follow a sequential and iterative design process of:… Read More
I must say the ARM conference gets better every year, as do the attendance numbers. More than 4,000 people showed up including 5 SemiWiki bloggers, two of which I had not yet had the pleasure of meeting.
First I have to mention my favorite vendor booth. I don’t remember what company it was but the girls in fishnet stockings giving out… Read More
Another announcement from the Warren East’s ARM keynote this morning was the creation of a SIG within Weightless, which is an organization responsible for delivering royalty-free open standards to enable the Internet of Things (IoT). The SIG is focused on accelerating the adoption of Weightless as a wireless wide area… Read More
Just in time for the Jasper User Group meeting, Jasper have a new white paper explaining the concept of JasperGold Apps.
First the User Group Meeting. It is in Cupertino at the Cypress Hotel November 12-13th. For more details and to register, go here. The meeting is free for qualified attendees (aka users). One thing I noticed at the… Read More
On Halloween, Atrenta and TSMC announced the availability of SpyGlass IP Kit 2.0. IP Kit is a fundamental element of TSMC’s soft IP9000 Quality Assessment program that assesses the robustness and completeness of soft (synthesizable) IP.
IP Kit 2.0 will be fully supported on TSMC-Online and available to all TSMC’s soft IP alliance… Read More
I went to Warren East’s keynote speech at ARM Techcon today. There had been some hints earlier in the week that some significant announcements would be made and, while they were not earth-shattering, I think that they will be significant in the long term.
One interesting thing that Warren pointed out is that the ARM partner… Read More
ARM TechCon Software and Systems Keynote: Why Ultra-Low Power Computing Will Change Everything Simon Segars, speaking of the importance of continuing low power initiatives, introduced Dr. Jonathan Koomey, Consulting Professor at Stanford. (First impression, our kind of guy: He wears engineer shoes, not sales shoes!)
Koomey… Read More
At CES 2011, Steven Sinofsky of Microsoft stepped on the stage and went off the map of proven Windows territory. Announcing the next version of Windows would support the ARM Architecture, including SoCs from Qualcomm, NVIDIA, and TI, set a new course for Microsoft.
But Windows, being the battleship-sized behemoth that it is, would… Read More
An announcement at the ARM conference was of a joint project to tape out an ARM Cortex-M0 in IBM’s 14nm FinFET process. In fact they taped out 3 different versions of the chip using different routing architectures to see the impact on yield.
This was the first 14nm ARM tapeout, it seems. I’m sure Intel has built plenty … Read More
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RISC-V Virtualization and the Complexity of MMUs