The second annual TSMC Open Integration Platform Ecosystem Forum was last week and let me tell you it was excellent. Great update on the TSMC process technology road maps, great for networking within the fabless semiconductor ecosystem, great for seeing what’s new in EDA and IP, and great for SemiWiki. It was time well spent for … Read More





A Brief History of Aldec
Dr. Stanley Hyduke founded Aldecin 1984 and their first product was delivered in 1985, named SUSIE (Standard Universal Simulator for Improved Engineering), a gate-level, DOS-based simulator. The SUSIE simulator was priced lower than other EDA vendor tools from the big three: Daisy, Mentor and Valid (aka DMV). Aldec maintains… Read More
DAC: It’s the Last Week for Many Submissions
The deadline is coming up at the end of next week (technically on Monday October 29th for those of you who like real brinkmanship) for several aspects of DAC (not submission of papers for the conference itself) but most of the less academic-oriented things.
Proposals for:
- Special Sessions
- Tutorials
- Panel sessions (in the conference
Intel Quarterly Report: Needs to Do Better
Intel announced its quarterly results a couple of days ago. They had previously downgraded 3rd quarter sales estimates but they managed to beat the downgraded numbers. If you look at the transcript of the call (I didn’t listen live) you’ll see very little mention of mobile and Atom. This is bad news for Intel. Its core… Read More
A Brief History of Mobile: Generations 3 and 4
The early first generation analog standards all used a technique known as Frequency Division Multiple Access (FDMA). All this means is that each call was assigned its own frequency band in the radio spectrum. Since each band was only allocated to one phone, there was no interference between different calls. When a call finished… Read More
Virtuoso Has Twins
Cadence has apparently announced that going forward the Virtuoso environment is going to be split into two and offered as two separate code-streams, the current IC6.x and a new IC12.x. The idea is to introduce a new product with features that were specifically developed for new technologies such as double patterning aware layout… Read More
iPhone5 Versus Samsung S3: the Key Question
In all the discussion about iPhone versus Samsung, the profit leader and the volume leader in the handset business, there is way too much discussion about boring stuff like how many MIPS the A6 chips has and whether the maps are any good on iPhone (no) and is there enough 28nm capacity for Qualcomm. Boring.
The real question that everyone… Read More
TSMC dilemma: Cadence, Mentor or Synopsys?
Looking at the Press Release (PR) flow, it was interesting to see how TSMC has solved a communication dilemma. At first, let’s precise that #1 Silicon foundry has to work with each of the big three EDA companies. As a foundry, you don’t want to lose any customer, and then you support every major design flow. Choosing another strategy… Read More
Xilinx Programmable Packet Processor
At the Linley conference last week I ran into Gordon Brebner of Xilinx. He and I go a long way back. We had adjacent offices in Edinburgh University Computer Science Department back when we were doing our PhDs and conspiring to network the department’s Vax into the university network over a two-week vacation. We managed to … Read More
8 Reasons Why I Hate My iPhone 5
Not really, but I regret upgrading from my Verizon based HTC Incredible to the iPhone 5. If you are on the fencebetween and iPhone 5 and a Samsung S3, consider reading this post.
I’ve been an anti Apple fan boy of sorts for the duration, but have gradually been sucked into the Apple eco system. I really like my iPad (3) and my “recliner … Read More
Unlocking the cloud: A new era for post-tapeout flow for semiconductor manufacturing