RFIC developers used to favor mature silicon processes, typically staying back a couple of nodes behind the leading edge. This bought foundries time for ‘RF-enabling’ their PDKs, and also maximized return on investment for developing RF models and infrastructure IP. Not the case any more, it seems. To address the insatiable … Read More




SemiWiki Top 10 Must See @ #50DAC List!
This list was compiled by the SemiWiki bloggers highlighting emerging technologies that we have written about and that will be demonstrated at the Design Automation Conference next week. We highly recommend you investigate them further during your time in Austin and please let us know what you think.
Today SemiWiki has more than… Read More
Robust Reliability Verification: Beyond Traditional Tools and Techniques
Robust Reliability Verification: Beyond Traditional Tools
by Matthew Hogan, Mentor Graphics
At all process nodes, countless hours are diligently expended to ensure that our integrated circuit (IC) designs will function in the way we intended, can be manufactured with satisfactory yields, and are delivered in a timely fashion… Read More
Cooley’s Cheesy Must See List for DAC is Out
One of the other increasingly successful channels (besides Semiwiki of course) for EDA, IP and semiconductor companies to reach potential customers is John Cooley’s DeepChip. Every year he puts a lot of effort into trying to find out who is exhibiting what at DAC and which stuff seems like it is new and maybe important, and… Read More
ARM Partners with Carbon on Cortex-A57
Just in time for DAC, Carbon have announced that they have expanded their partnership with ARM to create and deliver models for the ARM Cortex-A57 processor and related IP. One piece of related IP is the Cortex-A53 which can be configured in big.LITTLE multi-core setups to achieve the sweet spot of higher performance and lower power.… Read More
10 years, 100,000 miles, or <1 DPM
Auto makers have historically been accused of things like planned obsolescence – redesigning parts to make repairs painfully or even prohibitively expensive – and the “warranty time-bomb”, where major systems seem to fail about a week after the warranty expires. Optimists would chalk both those up to relentless innovation,… Read More
SEMulator3D – A Virtual Fab Platform
Yes, it’s a pleasant surprise; it is Virtual Fabrication Platform, one of the new innovations in 2013. I was looking around for what kind of breakthrough technologies will be announced in DAC this year. And here I came across this new kind of innovative tool which can produce final virtual fabricated 3D structures after following… Read More
You can tune a piano, but you can’t tune a cache without help
Once upon a time, designing a product with a first generation SoC on board, we were trying to use two different I/O peripherals simultaneously. Seemed simple enough, but things just flat out didn’t work. After days spent on RTFM (re-reading the fine manual), we found ourselves at the absolute last resort: ask our FAE.
After about… Read More
DAC lunch seminar: Better IP Test with IEEE P1687
What: DAC lunch seminar (register here)
When: June 5, 2013, 11:30am – 1:30pm
Where: At DAC in lovely Austin, TX
Dr. Martin Keim of Mentor Graphics will present this overview of the new the IEEE P1687 standard, called IJTAG for ‘internal’ JTAG.
If you are involved in IC test*, you’ve probably heard about IJTAG. If you … Read More
ARM SoC Hardening
Last year at DACI discovered a physical IP company called DXCorrthat competed against giant ARM. This year the company has selected a different direction, so I got caught up with Nirmalya Ghosh, the CEO to hear about the changes.
Nirmalya Ghosh, DXCorr
… Read More
Should Intel be Split in Half?