Full Spectrum Transient Noise: A must have sign-off analysis for silicon successNoise minimization is required for advanced analog and…Read More
PSS and UVM Work Together for System-Level VerificationIn the early days of the PSS rollout,…Read More
Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?Predictions in technology adoption often hinge on a…Read More
Smartphone and Media tablet markets are exploding, generating huge level of profit for the Apple, Samsung or Qualcomm, and we don’t see yet when the growth will stop. That’s a point. But is it a reason for analyst to write down everything that springs to mind, including obvious insanity? Let’s have a look at the diagram below, and … Read More
The decision made by United States Court of Appeals for the Federal Circuit, “Affirming” the District Court for the Northern District of California’s summary judgment of non-infringement on Kilopass’ patent claims and its dismissal, with prejudice, of all remaining claims against Sidense, is certainly a good news for IP and… Read More
I won’t be able to attend Chris Rowen’s presentation here at the GlobalPress Electronic Summit since I’m going to the first day of the Linley Mobile Microprocessor conference. In fact I wonder if Chris himself will make it since he was running in the Boston marathon on Monday. He finished about 10 minutes before… Read More
I have always felt that FPGAs have been the red haired step child of Silicon Valley. Software weenies have hated them, they are mysterious and take too long to route. Even though they can be massively parallel and the most deterministic piece of silicon you can buy besides a million dollar ASIC, the GPU steals their glory, for now. … Read More
I LOVE DAC is back. This year the sponsors are Atrenta, Jasper and Forte (hey, all semiwiki subscribers). The way it works is that you register on the DAC website here and you get a free three-day exhibit pass. In addition to everything going on in the exhibit hall, including the pavilion panels held there, the pass also gives access… Read More
As seems to be traditional, Wally Rhines gave a keynote here at the GlobalPress Electronics Summit here in sunny Santa Cruz. It was entitled Embedded Software, the Next Revolution in EDA. Unlike Cadence and Synopsys, Mentor has a strong position in embedded software. It has been build up over a long time through a series of acquisitions… Read More
I have spent the last couple of days at the GlobalPress Electronics Summit at the Chaminade Resort in Santa Cruz. Hey, it’s tough, but someone has to do it. One interesting presentation was from Cavendish Kinetics. It is especially interesting because many years ago Cavendish was founded by Mike Beunder, who I know well since… Read More
As I have mentioned 28 times already, on Friday (April 19[SUP]th[/SUP]) I will be keynoting FinFET day at the EDPS conference in Monterey. This is an excellent opportunity to ask the experts about the challenges of FinFET design and manufacturing in an intimate setting (60 people). If you are interested register today and use the… Read More
Tom Feist of Xilinx presented here at the GlobalPress Electronics Summit about their strategy to take design abstraction up another level. In the SoC world, we are still pretty much stuck at the RTL level and have moved to higher abstractions by using an IP strategy. But at least all IC designers are RTL-literate.
Xilinx, in the Vivado… Read More
Vince Hu of Altera presented us her at the GlobalPress Electronics Summit on their process roadmap. Since just a month or two ago they announced that Intel would be their foundry at 14nm, everyone wanted to get a better idea of what was really going on.
At 28nm, Altera use 2 processes, TSMC 28HP (for high end Stratix-5 devices) and TSMC… Read More
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Will 50% of New High Performance Computing (HPC) Chip Designs be Multi-Die in 2025?