The expansion of semiconductor manufacturing in the United States, particularly with TSMC’s multi-fab campus in Phoenix, Arizona, has created a significant need for skilled technical workers. To meet this demand, TSMC has partnered with educational institutions, including Grand Canyon University (GCU), to launch… Read More
Functional Safety Analysis of Electronic SystemsSafety engineers, hardware designers and reliability specialists in…Read More
RVA23 Ends Speculation’s Monopoly in RISC-V CPUsRVA23 marks a turning point in how mainstream…Read More
Perforce and Siemens Collaborate on 3DIC Design at the Chiplet SummitThe recent Chiplet Summit at the Santa Clara…Read More
Building the Interconnect Foundation: Bump and TSV Planning for Multi-Die SystemsThe first article in this series examined how…Read More
CHERI: Hardware-Enforced Capability Architecture for Systematic Memory SafetyThe rapid escalation of cyberattacks over the past…Read MoreCEO Interview with Dr. Raj Gautam Dutta of Silicon Assurance
Dr. Raj Gautam Dutta is the Co-Founder and Chief Executive Officer of Silicon Assurance, where he defines the company’s strategic direction and leads its technology and product vision. He is responsible for driving the development of differentiated hardware security solutions, executing growth and partnership strategies,… Read More
Podcast EP330: An Overview of DVCon U.S. 2026 with Xiaolin Chen
Daniel is joined by Xiaolin Chen, Senior Director of Technical Product Management for Formal Solutions at Synopsys. She has over 20 years of experience applying formal technology in verification and partnering with customers to identify opportunities where formal methods are best suited to solve complex verification challenges.… Read More
The Risk of Not Optimizing Clock Power
Clock power is rarely the issue teams expect to limit advanced-node designs. Yet in many chips today, over-driven clock networks quietly consume disproportionate power, reduce thermal headroom, and can constrain achievable frequency. And all while passing traditional sign-off checks and often remaining locked in through… Read More
Quadric’s Recent Momentum & Funding Success
Quadric®, Inc., headquartered in Burlingame, California, is accelerating its position as a leading provider of programmable AI inference processor intellectual property (IP) and development tools for on-device AI workloads. The company announced an oversubscribed $30 million Series C funding round, bringing total capital… Read More
Beyond Transformers. Physics-Centric Machine Learning for Analog
Physical AI is an emerging hot trend, popularly associated with robotics though it has much wider scope than compute systems interacting with the physical world. For any domain in which analysis rests on differential equations (foundational in physics), the transformer-based systems behind LLMs are not the best fit for machine… Read More
2026 Outlook with Abhijeet Chakraborty VP, R&D Engineering at Synopsys
Tell us a little bit about yourself and your company.
My name’s Abhijeet Chakraborty and I’m Vice President of Engineering at Synopsys. I led the development of Synopsys Design Compiler-NXT, the industry’s leading synthesis product, and now oversee the company’s multi-die and 3DIC product portfolio. Throughout my career,… Read More
The Launch of RISC-V Now! A New Chapter in Open Computing
On February 3, 2026, Andes Technology officially announced the launch of RISC-V Now!, a new global conference series designed around the next phase of RISC-V adoption: real-world deployment and commercial scaling. This initiative marks a shift from exploratory and research-focused events toward practical, production-oriented… Read More
NanoIC Extends Its PDK Portfolio with First A14 Logic and eDRAM Memory PDK
NanoIC has announced a major expansion of its process design kit portfolio with the introduction of its first A14 logic and embedded eDRAM memory PDK. This milestone reflects the company’s growing role in enabling advanced semiconductor design at cutting-edge technology nodes and addresses increasing industry demand for… Read More
2026 Outlook with Coby Hanoch of Weebit Nano
Coby Hanoch is the CEO of Weebit Nano. Coby has nearly 45 years’ of experience in the semiconductor and related industries, including engineering, engineering management, sales, and executive roles. Coby was previously CEO at PacketLight Networks, and held VP Worldwide Sales roles at both Verisity and Jasper Design Automation.… Read More


CEO Interview with Jerome Paye of TAU Systems