Automating Reset Domain Crossing (RDC) Verification with Advanced Data AnalyticsThe complexity of System-on-Chip (SoC) designs continues to…Read More
The Immensity of Software Development and the Challenges of Debugging Series (Part 2 of 4)Part 2 of this 4-part series reviews the…Read More
Collaboration Required to Maximize ASIC Chiplet ValueIt is a well-known fact that chiplets provide…Read More
In the world of electronic systems design, complexity has always been a major challenge. As technology advances and demands for more efficient and powerful electronic devices grow, engineers face increasingly intricate design requirements. These complexities often lead to longer design cycles, increased costs, … Read More
The current slump in the electronics market began in 2021. Smartphone shipments versus a year earlier turned negative in 3Q 2021. The smartphone market declines in 2020 were primarily due to COVID-19 related production cutbacks. The current smartphone decline is due to weak demand. According to IDC, smartphone shipments were… Read More
The ever-increasing demands placed on Intellectual Property (IP) and System-on-Chip (SoC) development teams have resulted in an ever-increasing need for automation solutions that can boost productivity without contributing to further risk. Certainly, demands for automation have long been the drivers behind the growth… Read More
I wrote earlier about managing service-level risk in SoC design, since the minimum service level a system can guarantee under realistic traffic is critical to OEM guarantees of dependable system performance. An ABS design which might get bogged down in traffic under only 0.1% of scenarios is of no use to anyone. That said, meeting… Read More
Wishful thinking once prevailed that embedded systems, especially small embedded devices, rarely needed security, and if they did, simply installing a “secure” operating system or a security chip would keep them safe. Connecting devices big and small on the Internet of Things (IoT) shattered such insular thinking… Read More
The MunEDA User Group Meeting (MUGM) has been an annual event since 2006, and this year there were some 80 participants from many customers that attended to share their experiences and learn how to get the best EDA tool results. I’ve been able to view the presentations and archived videos, so will share some of the interesting… Read More
Siemens EDA’s next move in its Calibre shift left strategy is the addition of correct-by-construction IC layout optimization for the most critical emerging physical design challenges. Calibre’s new DesignEnhancer product supports both custom and digital ICs and is already in use by several leading IC design companies. It … Read More
Almost everything that we do in chip design and verification was invented to raise the abstraction above schematics and polygons. Register-transfer-level (RTL) design, functional simulation, logic synthesis, floorplanning, and more fall into this category. Even the notion of binary circuits is an abstraction. Underneath… Read More
-SEMICON well attended but bouncing along the biz bottom
-Recovery seems at least a year away with memory even more
-AI creates hope but not impactful- Disconnect tween stocks & reality
-AMAT me too platform- Back end benefits from chiplets
SEMICON is certainly back to pre-covid levels or perhaps better.… Read More
Dan is joined by Calista Redmond, CEO of RISC-V International. Prior to RISC-V International, Calista held a variety of roles at IBM, including Vice President of IBM Z Ecosystem where she led strategic relationships across software vendors, system integrators, business partners, developer communities, and broader engagement… Read More
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