US20150202962 illustrates a system for controlling vehicle features via an augmented reality vehicle user interface. The system includes an image capturing device for capturing an image of the vehicle. The system identifies the points of interest that correspond to the vehicle features within portions of the image of the vehicle… Read More



Does the Internet of Things need new Artificial Intelligence?
Judging by the number of confusing posts, blogs and articles on this topic, anyone exploring the potential of what the IOT can deliver to their business/organisation can be forgiven for thinking that the IOT will need a new set of AI technologies to work correctly. Throw into the mix the hype that the IOT will need big data analytics… Read More
Reconfigurable redefined with embedded FPGA core IP
On November 1, 1985, before anyone had heard the phrase field programmable gate array, Xilinx introduced what they called a “new class of ASIC” – the XC2064, with a whopping 1200 gates. Reconfigurable computing was born and thrived around the RAM-based FPGA, whose logic and input/output pins could be architected into a variety… Read More
ARM POPs Another One!
ARM announced a new POP deal with UMC 28nm last week. POP stands for Processor Optimized Package meaning physical IP libraries (logic and memory) are customized for ARM processor cores and mainstream EDA tools creating a platform for optimized chip design. POP is a much bigger deal than most people realize so let’s get into a little… Read More
Fastest SoC time-to-success: emulators, or FPGA-based prototypes?
Hardware emulators and FPGA-based prototyping systems are descendants of the same ancestor. The Quickturn Systems Rapid Prototype Machine (RPM) introduced in May 1988 brought an array of Xilinx XC3090 FPGAs to emulate designs with hundreds of thousands of gates. From there, hardware emulators and FPGA-based prototyping … Read More
Top Ten Insights on the EDA and Semiconductor Industry
I recently had the opportunity to chat with Anirudh Devgan, senior vice president and general manager at Cadence, who leads the Digital and Signoff Group. We discussed recent product development initiatives at Cadence, and talked about future EDA and semiconductor market opportunities. His insights and comments were keen … Read More
Positive pointers from Samsung, GF, Renesas, NXP/Freescale, ST, Soitec – so will 2016 be the year of FD-SOI?
A little over a month into 2016 and we already have a raft of FD-SOI news from Samsung, GlobalFoundries, NXP/Freescale, Renesas and more. Quite a bit of it came out of the recent SOI Consortium forum in Tokyo. Many of the presentations are now available on the SOI Consortium website (click here to see what’s there) – but keep checking… Read More
Early Structural Reliability Analysis of a Chip-Package-System design is a must!
2015 will be remembered as the year when chip-package-system (CPS) physical co-design and electrical/thermal analysis methodologies took center stage.… Read More
Semiconductor, Oil, and GDP – Correlated? What’s Expected?
In last 3 decades of semiconductor market, the largest growth in IC sales was at 33% in 2010. At that time global recession had started due to financial crisis and in 2009 oil prices fell more than 30%. It appeared that oil prices were negatively correlated with semiconductor market growth. Today again there is another sharp decline… Read More
Smart Phones and the Chinese Marketplace
My first mobile phone was from Motorola and it was fondly called the “brick phone” because of its crude shape. That phone helped me be more efficient while living and working in Silicon Valley, because long commute times in the car were common. At one time Motorola was the best-selling mobile phone brand in the world,… Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot