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Machine Learning Optimizes FPGA Timing

Machine Learning Optimizes FPGA Timing
by Bernard Murphy on 08-04-2017 at 7:00 am

Machine learning (ML) is the hot new technology of our time so EDA development teams are eagerly searching for new ways to optimize various facets of design using ML to distill wisdom from the mountains of data generated in previous designs. Pre-ML, we had little interest in historical data and would mostly look only at localized… Read More


ClioSoft’s designHUB Debut Well Received

ClioSoft’s designHUB Debut Well Received
by Mitch Heins on 08-03-2017 at 12:00 pm

It was only back in May of this year that ClioSoft first introduced designHUB, a revolutionary new product that is meant to enable better use of intellectual property (IP) within a company. I wrote a SemiWiki article at the time of the announcement and mentioned it again in a lead-up article to the 54[SUP]th[/SUP] Design Automation… Read More


Automotive System Reliability – ISO 26262 impacts IP and Tools

Automotive System Reliability – ISO 26262 impacts IP and Tools
by Tom Simon on 08-03-2017 at 7:00 am

If you have been following the topic of ISO 26262, you now realize that IP, or even EDA design tools, developed with the highest quality standards still can’t be ISO 26262 certified. Recently I had a conversation with Kurt Shuler from Arteris about this topic. He is VP of Marketing at Arteris, and he is also on several ISO 26262 technical… Read More


If you could ‘design’ your own child, would you?

If you could ‘design’ your own child, would you?
by Vivek Wadhwa on 08-02-2017 at 12:00 pm

Scientists in Portland, Ore., just succeeded in creating the first genetically modified human embryo in the United States, according to Technology Review. A team led by Shoukhrat Mitalipov of Oregon Health & Science University is reported to “have broken new ground both in the number of embryos experimented upon and by demonstrating… Read More


Cloud-Based Emulation

Cloud-Based Emulation
by Bernard Murphy on 08-02-2017 at 7:00 am

At the risk of attracting contempt from terminology purists, I think most of us would agree that emulation is a great way to prototype a hardware design before you commit to building, especially when you need to test system software together with that prototype. But setting up your own emulation resource isn’t for everyone. The … Read More


AI ASICs Exposed!

AI ASICs Exposed!
by Daniel Nenni on 08-01-2017 at 12:00 pm

Artificial intelligence, or AI is really heating up these days. The technology has been around for decades, but of late it is becoming quite a focus for applications such as data center analytics, autonomous vehicles and augmented reality. Why the rebirth? The trend appears to be driven by two forces – availability of data to train… Read More


ARM and Cadence IP Simplify IoT System Design and Verification

ARM and Cadence IP Simplify IoT System Design and Verification
by Mitch Heins on 08-01-2017 at 7:00 am

As the Internet-of-Things (IoT) markets mature, we are seeing the complexity of IoT systems evolve from simple routing functions that connect IoT edge devices to the cloud into more complex system of systems that manage the interaction between multiple sensor-hubs. IoT sensor-hubs and gateways not only take care of basic care… Read More


Samsung Sloppy Sailor Spending Spree!

Samsung Sloppy Sailor Spending Spree!
by Robert Maire on 07-31-2017 at 12:00 pm

Last week, TEL (which is the Japanese equivalent to AMAT & LRCX) reported a June quarter which saw revenues drop to 236B Yen from March’s 261B Yen and saw earnings drop from March’s 47B Yen to June’s 41B Yen, a respective 9.3% decrease and a 12.8% decrease in earnings.

We don’t think this is attributable… Read More


Synopsys Opens up on Emulation

Synopsys Opens up on Emulation
by Bernard Murphy on 07-31-2017 at 7:00 am

Synopsys hosted a lunch panel on Tuesday of DAC this year, in which verification leaders from Intel, Qualcomm, Wave Computing, NXP and AMD talked about how they are using Synopsys verification technologies. Panelists covered multiple domains but the big takeaway for me was their full-throated endorsement of the ZeBu emulation… Read More


SEMICON West – Advanced Interconnect Challenges

SEMICON West – Advanced Interconnect Challenges
by Scotten Jones on 07-28-2017 at 12:00 pm

At SEMICON West I attended the imec technology forum where Zsolt Tokei presented “How to Solve the BEOL RC Dilemma” and the SEMICON Economics of Density Scaling session where Larry Clevenger of IBM presented “Interconnect Scaling Strategic for Advanced Semiconductor Nodes”. I also had the opportunity… Read More