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Samsung Foundry Update 2019

Samsung Foundry Update 2019
by Tom Dillinger on 06-08-2019 at 5:00 am

Samsung Foundry recently held their 4th annual technology forum in Santa Clara.  This article reviews the highlights of the presentations.  There were two prevalent themes throughout – focused execution on the current process roadmap, and the introduction of the 3nm process node features and schedule.

Before getting into … Read More


56th DAC Las Vegas Trip Report

56th DAC Las Vegas Trip Report
by Daniel Nenni on 06-07-2019 at 5:00 am

Having just returned from my 35th DAC I would like to share a few thoughts with the organizers, exhibitors, and attendees. In my experience it was a really well planned DAC. Personally, I like the Las Vegas venue even though it is not near a semiconductor populated city. Those who chose to attend this year were there for a reason which… Read More


Visual SLAM at the Edge

Visual SLAM at the Edge
by Bernard Murphy on 06-06-2019 at 5:00 am

SLAM – simultaneous localization and mapping – is critical for mobile robotics and VR/AR headsets among other applications, all of which typically operate indoors where GPS or inertial measurement units are either ineffective or insufficiently accurate. SLAM is a chicken and egg problem in which the system needs to map its environment… Read More


#56DAC – Machine Learning and its impact on the Digital Design Engineer

#56DAC – Machine Learning and its impact on the Digital Design Engineer
by Daniel Payne on 06-05-2019 at 12:05 am

Tuesday Panelists

Tuesday for lunch at #56DAC I caught up to the AI/ML experts at the panel discussion hosted by Cadence. Our moderator was the affable and knowledgable Prof.  Andrew Kahng from UC San Diego. Attendance was good, and interest was quite high as measured by the number of audience questions. I learned that EDA tools that use heuristics… Read More


#56DAC – Panel Discussion: Closing Analog and Mixed-Signal Verification in 5G, HPC and Automotive

#56DAC – Panel Discussion: Closing Analog and Mixed-Signal Verification in 5G, HPC and Automotive
by Daniel Payne on 06-04-2019 at 9:53 am

Cadence luncheon, panelists

Monday afternoon at #56DAC I enjoyed attending a luncheon panel discussion from four AMS experts and moderator, Prof. Georges Gielen, KU Leuven. I follow all things SPICE and this seemed like a great place to get a front-row seat about the challenges that only a SPICE circuit simulator can address.  Here’s a brief introduction… Read More


Cadence Releases Enterprise-Level FPGA Prototyping

Cadence Releases Enterprise-Level FPGA Prototyping
by Bernard Murphy on 06-04-2019 at 5:00 am

Big prototyping hardware is essential to modern firmware and software development for pre-silicon, multi-billion gate hardware. For hardware verification it complements emulation, running fast enough for realistic testing on big software loads while still allowing fast-switch to emulation for more detailed debug where… Read More


2020 57thDAC to Co-Locate with SEMICON West!

2020 57thDAC to Co-Locate with SEMICON West!
by Daniel Nenni on 06-04-2019 at 1:54 am

Probably the most interesting news out of 56thDAC thus far is the announcement that in 2020 and 2021 DAC will co-locate with SEMICON West. It’s great news really since this is something that has been discussed over the years but has been deadlocked due to “failed negotiations”. Unfortunately, simple logic goes out the window with… Read More


Parallel SPICE Circuit Simulator Debuts

Parallel SPICE Circuit Simulator Debuts
by Daniel Payne on 06-03-2019 at 10:01 am

Spectre X, speed improvements

In EDA the most successful companies will often re-write their software tools in order to add new features, improve accuracy, increase capacity and of course, shorten run times. For SPICE circuit simulators we typically look at several factors to see if a new tool is worth a look or not:

  • Netlist compatibility
  • Model support
  • Foundry
Read More

A Practical Approach to Modeling ESD Protection Devices for Circuit Simulation

A Practical Approach to Modeling ESD Protection Devices for Circuit Simulation
by Tom Simon on 06-03-2019 at 8:00 am

Lurking inside of every Mosfet is a parasitic bipolar junction transistor (BJT). Of course, in normal circuit operation the BJT does not play a role in the device operation. Accordingly, SPICE models for Mosfets do not behave well when the BJT is triggered. However, these models work just fine for most purposes. The one important… Read More


The Genius Sperm Bank

The Genius Sperm Bank
by John East on 06-03-2019 at 5:00 am

The “20 Questions with John East” series continues

How did it happen?  How did Fairchild transform over a decade into the “off with their heads” culture?  To understand that, you need to know a little about the William Shockley story. William Shockley was born in London in 1910.  He moved to Silicon Valley when he was 3.  Of course,… Read More