There’s a new sheriff in town at the U.S. Department of Transportation in the form of Department Secretary Pete Buttigieg with an acting deputy in Acting Administrator Dr. Steve Cliff at the National Highway Traffic Safety Administration (NHTSA). NHTSA has served notice on bad boy Tesla CEO Elon Musk that it is investigating
From Detection to Safety: Reframing Fault Simulation for Functional SafetyIn the early 1980s, when computer-aided engineering (CAE),…Read More
Driving the Future through the “Talent Empowering Program”: Why TSMC Charity Foundation’s Youth Career Initiative MattersThe future of work will not be shaped…Read More
Foundation IP for Intel 18A: Technical Overview and Why It MattersSynopsys Foundation IP for Intel 18A is a…Read More
WEBINAR: Defacto is Boosting Front-end SoC Design With AI-Powered EDA toolsThe real promise of AI in EDA is…Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too LateChip-level vulnerability is becoming an existential threat for…Read MoreVerifications Horizons 2021, Now More Siemens
In a discussion with Tom Fitzpatrick of Siemens EDA he recalled that their Verification Horizons newsletter started 17 years ago, back when they were Mentor. We’ve known about the Siemens acquisition for a while. The deal closed in March 2017, but it wasn’t until January 1, 2021 that the legal entity merger was complete. Which makes… Read More
Ansys IDEAS Digital Forum 2021 Offers an Expanded Scope on the Future of Electronic Design
For those of you following the latest developments in electronic design it has become clear that the industry is transitioning through an inflection point that is shifting some of the ground rules of design. The increase in the speed and integration density in today’s systems are blurring the lines between chip design and system… Read More
IoT and 5G Convergence
The Convergence of 5G and Internet of Things (IoT) is the next natural move for two advance technologies built to make users lives convenient, easier and more productive. But before talking about how they will unite we need to understand each of the two technologies.
Simply defined; 5G is the next-generation cellular network… Read More
Podcast EP36: Semiconductor Design Acceleration
Dan and Mike are joined by Michael Johnson (MJ), CTO at NetApp. MJ provides “behind the scene” insights into NetApp technology and how it has quietly revolutionized information storage and management for chip design. The key enabling technologies along with specific use cases are discussed. MJ also discusses moving… Read More
The Arm China Debacle and TSMC
Having spent 40 years in the semiconductor industry, many years working with Arm and even publishing the definitive history book “Mobile Unleashed: The Origin and Evolution of ARM Processors in Our Devices” plus having spent more than 20 years working with China based companies, I found the recent Arm China media circus quite … Read More
Why Optimizing 3DIC Designs Calls for a New Approach
The adoption of 3DIC architectures, while not new, is enjoying a surge in popularity as product developers look to their inherent advantages in performance, cost, and the ability to combine heterogeneous technologies and nodes into a single package. As designers struggle to find ways to scale with complexity and density limitations… Read More
Optimize AI Chips with Embedded Analytics
The foundry model, multi-source IP blocks, advanced packaging technologies, cloud computing, hyper-connectivity and access to open-source software have all contributed to the incredible electronics products of recent times. Along with this, the complexity of developing and taking a chip to market has also increased. And… Read More
Intel Architecture Day – Part 2: GPUs, IPUs, XeSS, OpenAPI
Introduction
At the recent Intel Architecture Day presentations, a breadth of roadmap plans were provided – an earlier article focused on the x86 client and data center cores and products. This article focuses on the GPU and IPU announcements.
Xe Graphics Core
The Intel GPU architecture for embedded, discrete, and data center… Read More
Intel Architecture Day – Part 1: CPUs
Introduction
The optimization of computing throughput, data security, power efficiency, and total cost of ownership is an effort that involves managing interdependencies between silicon and packaging technologies, architecture, and software. We often tend to focus on the technology, yet the architecture and software… Read More


The Packaging PDK Is the Missing Layer for Co-Packaged Optics